physical.hh

Go to the documentation of this file.

/*
 * Copyright (c) 2012 ARM Limited
 * All rights reserved
 *
 * The license below extends only to copyright in the software and shall
 * not be construed as granting a license to any other intellectual
 * property including but not limited to intellectual property relating
 * to a hardware implementation of the functionality of the software
 * licensed hereunder.  You may use the software subject to the license
 * terms below provided that you ensure that this notice is replicated
 * unmodified and in its entirety in all distributions of the software,
 * modified or unmodified, in source code or in binary form.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are
 * met: redistributions of source code must retain the above copyright
 * notice, this list of conditions and the following disclaimer;
 * redistributions in binary form must reproduce the above copyright
 * notice, this list of conditions and the following disclaimer in the
 * documentation and/or other materials provided with the distribution;
 * neither the name of the copyright holders nor the names of its
 * contributors may be used to endorse or promote products derived from
 * this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __MEM_PHYSICAL_HH__
#define __MEM_PHYSICAL_HH__
 
#include <cstdint>
#include <string>
#include <vector>
 
#include "base/addr_range.hh"
#include "base/addr_range_map.hh"
#include "mem/packet.hh"
#include "sim/serialize.hh"
 
namespace gem5
{
 
namespace memory
{
 
class AbstractMemory;
 
class BackingStoreEntry
{
  public:
 
    BackingStoreEntry(AddrRange range, uint8_t* pmem,
                      bool conf_table_reported, bool in_addr_map, bool kvm_map,
                      int shm_fd=-1, off_t shm_offset=0)
        : range(range), pmem(pmem), confTableReported(conf_table_reported),
          inAddrMap(in_addr_map), kvmMap(kvm_map), shmFd(shm_fd),
          shmOffset(shm_offset)
        {}
 
     AddrRange range;
 
     uint8_t* pmem;
 
     bool confTableReported;
 
     bool inAddrMap;
 
     bool kvmMap;
 
     int shmFd;
 
     off_t shmOffset;
};
 
class PhysicalMemory : public Serializable
{
 
  private:
 
    // Name for debugging
    std::string _name;
 
    // Global address map
    AddrRangeMap<AbstractMemory*, 1> addrMap;
 
    // All address-mapped memories
    std::vector<AbstractMemory*> memories;
 
    // The total memory size
    uint64_t size;
 
    // Let the user choose if we reserve swap space when calling mmap
    const bool mmapUsingNoReserve;
 
    const std::string sharedBackstore;
    uint64_t sharedBackstoreSize;
 
    long pageSize;
 
    // The physical memory used to provide the memory in the simulated
    // system
    std::vector<BackingStoreEntry> backingStore;
 
    // Prevent copying
    PhysicalMemory(const PhysicalMemory&);
 
    // Prevent assignment
    PhysicalMemory& operator=(const PhysicalMemory&);
 
    void createBackingStore(AddrRange range,
                            const std::vector<AbstractMemory*>& _memories,
                            bool conf_table_reported,
                            bool in_addr_map, bool kvm_map);
 
  public:
 
    PhysicalMemory(const std::string& _name,
                   const std::vector<AbstractMemory*>& _memories,
                   bool mmap_using_noreserve,
                   const std::string& shared_backstore,
                   bool auto_unlink_shared_backstore);
 
    ~PhysicalMemory();
 
    const std::string name() const { return _name; }
 
    bool isMemAddr(Addr addr) const;
 
    AddrRangeList getConfAddrRanges() const;
 
    uint64_t totalSize() const { return size; }
 
    std::vector<BackingStoreEntry> getBackingStore() const
    { return backingStore; }
 
    void access(PacketPtr pkt);
 
    void functionalAccess(PacketPtr pkt);
 
    void serialize(CheckpointOut &cp) const override;
 
    void serializeStore(CheckpointOut &cp, unsigned int store_id,
                        AddrRange range, uint8_t* pmem) const;
 
    void unserialize(CheckpointIn &cp) override;
 
    void unserializeStore(CheckpointIn &cp);
 
};
 
} // namespace memory
} // namespace gem5
 
#endif //__MEM_PHYSICAL_HH__