Contains class definitions for data flowing between pipeline stages in the top-level structure portion of this model. More...

#include "cpu/minor/buffers.hh"
#include "cpu/minor/dyn_inst.hh"
#include "cpu/base.hh"

Classes
class	gem5::minor::BranchData
	Forward data betwen Execute and Fetch1 carrying change-of-address/stream information. More...

class	gem5::minor::ForwardLineData
	Line fetch data in the forward direction. More...

class	gem5::minor::ForwardInstData
	Forward flowing data between Fetch2,Decode,Execute carrying a packet of instructions of a width appropriate to the configured stage widths. More...

Namespaces
namespace	gem5
	Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.

namespace	gem5::minor

Functions
std::ostream &	gem5::minor::operator<< (std::ostream &os, BranchData::Reason reason)
	Print a branch reason enum.

std::ostream &	gem5::minor::operator<< (std::ostream &os, const BranchData &branch)
	Print BranchData contents in a format suitable for DPRINTF comments, not for MinorTrace.

Variables
const unsigned int	gem5::minor::MAX_FORWARD_INSTS = 16
	Maximum number of instructions that can be carried by the pipeline.

Detailed Description

Contains class definitions for data flowing between pipeline stages in the top-level structure portion of this model.

Latch types are also defined which pair forward/backward flowing data specific to each stage pair.

No post-configuration inter-stage communication should ever take place outside these classes (except for reservation!)

Definition in file pipe_data.hh.

Classes