gem5  v22.0.0.1
plic_device.hh
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37 
38 #ifndef __DEV_RISCV_PLIC_DEVICE_HH__
39 #define __DEV_RISCV_PLIC_DEVICE_HH__
40 
41 #include "dev/io_device.hh"
42 #include "dev/platform.hh"
43 #include "params/PlicIntDevice.hh"
44 #include "sim/system.hh"
45 
46 namespace gem5
47 {
48 
49 using namespace RiscvISA;
50 
52 {
53  protected:
57 
58  public:
59  typedef PlicIntDeviceParams Params;
60 
61  const Params &
62  params() const
63  {
64  return dynamic_cast<const Params &>(_params);
65  }
66 
67  PlicIntDevice(const Params &params);
68 
69  const int &
70  id()
71  {
72  return _interruptID;
73  }
74 
75 };
76 
77 } // namespace gem5
78 
79 #endif // __DEV_RISCV_PLIC_DEVICE_HH__
gem5::scmi::Platform
Definition: scmi_platform.hh:265
io_device.hh
system.hh
gem5::PlicIntDevice::platform
Platform * platform
Definition: plic_device.hh:55
gem5::PlicIntDevice::_interruptID
int _interruptID
Definition: plic_device.hh:56
gem5::PlicIntDevice
Definition: plic_device.hh:51
gem5::PioDevice::Params
PioDeviceParams Params
Definition: io_device.hh:134
gem5::PlicIntDevice::system
System * system
Definition: plic_device.hh:54
gem5::System
Definition: system.hh:75
gem5::PlicIntDevice::Params
PlicIntDeviceParams Params
Definition: plic_device.hh:59
gem5::PlicIntDevice::id
const int & id()
Definition: plic_device.hh:70
platform.hh
gem5::PlicIntDevice::params
const Params & params() const
Definition: plic_device.hh:62
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::BasicPioDevice
Definition: io_device.hh:147

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