register_file_cache.hh

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#ifndef __REGISTER_FILE_CACHE_HH__
#define __REGISTER_FILE_CACHE_HH__
 
#include <limits>
#include <unordered_set>
#include <vector>
 
#include "base/statistics.hh"
#include "base/types.hh"
#include "gpu-compute/misc.hh"
#include "sim/sim_object.hh"
 
namespace gem5
{
 
class ComputeUnit;
class Wavefront;
 
struct RegisterFileCacheParams;
 
class RegisterFileCache : public SimObject
{
  public:
    RegisterFileCache(const RegisterFileCacheParams &p);
    virtual ~RegisterFileCache();
    virtual void setParent(ComputeUnit *_computeUnit);
    int cacheSize() const { return _capacity; }
 
    // Debug functions
    virtual std::string dumpLL() const;
 
    // Abstract Register Event
    class RegisterCacheEvent : public Event
    {
      protected:
        RegisterFileCache *rfc;
        int regIdx;
 
      public:
        RegisterCacheEvent(RegisterFileCache *rfc, int regIdx)
            : rfc(rfc), regIdx(regIdx) { setFlags(AutoDelete); }
    };
 
    class MarkRegCachedEvent : public RegisterCacheEvent
    {
      public:
        MarkRegCachedEvent(RegisterFileCache *rfc, int regIdx)
            : RegisterCacheEvent(rfc, regIdx) { }
        void process();
    };
 
    virtual void enqCacheInsertEvent(uint32_t regIdx, uint64_t delay);
 
    virtual void waveExecuteInst(Wavefront *w, GPUDynInstPtr ii);
 
    // Add register to rfc using LRU replacement policy
    virtual void markRFC(int regIdx);
 
    virtual bool inRFC(int regIdx);
 
  protected:
    ComputeUnit* computeUnit;
    int simdId, _capacity;
 
    class OrderedRegs
    {
      public:
        int regIdx;
 
        OrderedRegs* next;
        OrderedRegs* prev;
        OrderedRegs(int val) : regIdx(val), next(nullptr), prev(nullptr) {}
    };
 
    // Doubly linked list, head is the most recently used
    std::unordered_map<int, OrderedRegs*> lruHash;
    OrderedRegs* lruHead = nullptr;
    OrderedRegs* lruTail = nullptr;
 
};
 
} // namespace gem5
 
#endif // __REGISTER_FILE_CACHE_HH__