gem5  v21.2.1.1
wavefront.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2011-2017 Advanced Micro Devices, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * 3. Neither the name of the copyright holder nor the names of its
16  * contributors may be used to endorse or promote products derived from this
17  * software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef __GPU_COMPUTE_WAVEFRONT_HH__
33 #define __GPU_COMPUTE_WAVEFRONT_HH__
34 
35 #include <cassert>
36 #include <deque>
37 #include <list>
38 #include <memory>
39 #include <unordered_map>
40 #include <vector>
41 
42 #include "arch/gpu_isa.hh"
43 #include "base/logging.hh"
44 #include "base/statistics.hh"
45 #include "base/stats/group.hh"
46 #include "base/types.hh"
47 #include "config/the_gpu_isa.hh"
52 #include "gpu-compute/lds_state.hh"
53 #include "gpu-compute/misc.hh"
54 #include "params/Wavefront.hh"
55 #include "sim/sim_object.hh"
56 
57 namespace gem5
58 {
59 
60 class Wavefront : public SimObject
61 {
62  public:
63  enum status_e
64  {
65  // wavefront is stalled
67  // wavefront is returning from a kernel
69  // wavefront is running normally
71  // wavefront is stalled
73 
75 
93  };
94 
95  // HW slot id where the WF is mapped to inside a SIMD unit
96  const int wfSlotId;
97  int kernId;
98  // SIMD unit where the WV has been scheduled
99  const int simdId;
100  // id of the execution unit (or pipeline) where the oldest instruction
101  // of the WF is scheduled
105  // pointer to parent CU
108 
110 
112  bool dropFetch;
113  // last tick during which all WFs in the CU are not idle
115 
116  // Execution unit resource ID's associated with this WF
117  // These are static mappings set at WF slot construction and
118  // based off of the simdId and wfSlotId.
119 
120  // Index to scalarALUs resource vector in CU
122 
123  // Indices into readyList/dispatchList of resources used by this
124  // wavefront
127  int localMem;
129 
130  // number of VGPRs required by WF
131  uint32_t maxVgprs;
132  // number of SGPRs required by WF
133  uint32_t maxSgprs;
134  void freeResources();
136  void setStatus(status_e newStatus);
137  status_e getStatus() { return status; }
138  void resizeRegFiles(int num_vregs, int num_sregs);
141  bool isOldestInstWaitcnt();
142  bool isOldestInstSleep();
143  bool isOldestInstGMem();
144  bool isOldestInstLMem();
145  bool isOldestInstPrivMem();
146  bool isOldestInstFlatMem();
147  bool isOldestInstVectorALU();
148  bool isOldestInstScalarALU();
149  bool isOldestInstScalarMem();
150  bool isOldestInstBarrier();
151 
152  // used for passing spill address to DDInstGPU
156  /* kernel launch parameters */
157  uint32_t workGroupId[3];
158  uint32_t workGroupSz[3];
159  uint32_t gridSz[3];
160  uint32_t wgId;
161  uint32_t wgSz;
162  /* the actual WG size can differ than the maximum size */
163  uint32_t actualWgSz[3];
164  uint32_t actualWgSzTotal;
165  void computeActualWgSz(HSAQueueEntry *task);
166  // wavefront id within a workgroup
167  uint32_t wfId;
168  uint32_t maxDynWaveId;
169  uint32_t dispatchId;
170  // vector and scalar memory requests pending in memory system
172  // outstanding global memory write requests
174  // outstanding local memory write requests
176  // outstanding global memory read requests
178  // outstanding local memory read requests
180  // outstanding scalar memory read requests
182  // outstanding scalar memory write requests
190 
192  uint64_t lastTrace;
193  // number of virtual vector registers reserved by WF
195  // number of virtual scalar registers reserved by WF
197  // Index into the Vector Register File's namespace where the WF's registers
198  // will live while the WF is executed
199  uint32_t startVgprIndex;
200  // Index into the Scalar Register File's namespace where the WF's registers
201  // will live while the WF is executed
202  uint32_t startSgprIndex;
203 
204  // Old value of destination gpr (for trace)
206  // Id of destination gpr (for trace)
207  uint32_t oldVgprId;
208  // Tick count of last old_vgpr copy
209  uint64_t oldVgprTcnt;
210 
211  // Old value of destination gpr (for trace)
213  // Id of destination gpr (for trace)
214  uint32_t oldDgprId;
215  // Tick count of last old_vgpr copy
216  uint64_t oldDgprTcnt;
217 
218  // Execution mask at wavefront start
220 
221  // a pointer to the fraction of the LDS allocated
222  // to this workgroup (thus this wavefront)
224 
225  // unique WF id over all WFs executed across all CUs
226  uint64_t wfDynId;
227 
228  // dyn inst id (per SIMD) of last instruction exec from this wave
229  uint64_t lastInstExec;
230 
231  // Map to track the dyn instruction id of each vector register value
232  // produced, indexed by physical vector register ID
233  std::unordered_map<int,uint64_t> rawDist;
234 
235  // Counts the number of reads performed to each physical register
236  // - counts are reset to 0 for each dynamic wavefront launched
238 
239  void initRegState(HSAQueueEntry *task, int wgSizeInWorkItems);
240 
241  // context for save/restore
242  uint8_t *context;
243 
244  typedef WavefrontParams Params;
245  Wavefront(const Params &p);
246  ~Wavefront();
247  virtual void init();
248 
249  void
251  {
252  computeUnit = cu;
253  }
254 
256  void start(uint64_t _wfDynId, uint64_t _base_ptr);
257  void exec();
258  // called by SCH stage to reserve
260  bool stopFetch();
261 
262  Addr pc() const;
263  void pc(Addr new_pc);
264 
265  VectorMask& execMask();
266  bool execMask(int lane) const;
267 
268 
269  void discardFetch();
270 
271  bool waitCntsSatisfied();
272  void setWaitCnts(int vm_wait_cnt, int exp_wait_cnt, int lgkm_wait_cnt);
273  void clearWaitCnts();
274 
275  void incVMemInstsIssued();
276  void incExpInstsIssued();
277  void incLGKMInstsIssued();
278  void decVMemInstsIssued();
279  void decExpInstsIssued();
280  void decLGKMInstsIssued();
281 
283  void freeRegisterFile();
284 
285  bool sleepDone();
286  void setSleepTime(int sleep_time);
287 
288  TheGpuISA::GPUISA&
290  {
291  return _gpuISA;
292  }
293 
294  void barrierId(int bar_id);
295  int barrierId() const;
296  bool hasBarrier() const;
297  void releaseBarrier();
298 
299  private:
300  TheGpuISA::GPUISA _gpuISA;
301 
304 
327  int sleepCnt;
331  int barId;
332 
333  public:
335  {
337 
338  // Number of instructions executed by this wavefront slot across all
339  // dynamic wavefronts
341 
342  // Number of cycles this WF spends in SCH stage
344 
345  // Number of stall cycles encounterd by this WF in SCH stage
347 
348  // The following stats sum to the value of schStalls, and record, per
349  // WF slot, what the cause of each stall was at a coarse granularity.
350 
351  // Cycles WF is selected by scheduler, but RFs cannot support
352  // instruction
354  // Cycles spent waiting for execution resources
356  // cycles spent waiting for RF reads to complete in SCH stage
358  // LDS arbitration stall cycles. WF attempts to execute LM instruction,
359  // but another wave is executing FLAT, which requires LM and GM and
360  // forces this WF to stall.
362 
363  // number of times an instruction of a WF is blocked from being issued
364  // due to WAR and WAW dependencies
366  // number of times an instruction of a WF is blocked from being issued
367  // due to WAR and WAW dependencies
369 
370  // Distribution to track the distance between producer and consumer
371  // for vector register values
373 
374  // Distribution to track the number of times every vector register
375  // value produced is consumed.
377  } stats;
378 };
379 
380 } // namespace gem5
381 
382 #endif // __GPU_COMPUTE_WAVEFRONT_HH__
gem5::statistics::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:1930
gem5::Wavefront::expWaitCnt
int expWaitCnt
Definition: wavefront.hh:322
gem5::Wavefront::workItemFlatId
std::vector< uint32_t > workItemFlatId
Definition: wavefront.hh:155
gem5::Wavefront::vecReads
std::vector< int > vecReads
Definition: wavefront.hh:237
gem5::Wavefront::S_STALLED
@ S_STALLED
Definition: wavefront.hh:72
gem5::Wavefront::vmemInstsIssued
int vmemInstsIssued
Definition: wavefront.hh:324
hsa_queue_entry.hh
gem5::Wavefront::lastAddr
std::vector< Addr > lastAddr
Definition: wavefront.hh:153
gem5::Wavefront::isOldestInstFlatMem
bool isOldestInstFlatMem()
Definition: wavefront.cc:714
gem5::Wavefront::computeActualWgSz
void computeActualWgSz(HSAQueueEntry *task)
Definition: wavefront.cc:1403
gem5::Wavefront::S_RUNNING
@ S_RUNNING
Definition: wavefront.hh:70
gem5::statistics::Distribution
A simple distribution stat.
Definition: statistics.hh:2084
gem5::Wavefront::setSleepTime
void setSleepTime(int sleep_time)
Definition: wavefront.cc:1261
gem5::Wavefront::releaseBarrier
void releaseBarrier()
Definition: wavefront.cc:1434
gem5::Wavefront::flatLmUnitId
int flatLmUnitId
Definition: wavefront.hh:103
gem5::Wavefront::WavefrontStats::schStalls
statistics::Scalar schStalls
Definition: wavefront.hh:346
gem5::Wavefront::isOldestInstBarrier
bool isOldestInstBarrier()
Definition: wavefront.cc:649
group.hh
gem5::Wavefront::oldVgpr
std::vector< uint32_t > oldVgpr
Definition: wavefront.hh:205
gem5::Wavefront::_execMask
VectorMask _execMask
Definition: wavefront.hh:330
gem5::Wavefront::maxSgprs
uint32_t maxSgprs
Definition: wavefront.hh:133
gem5::Wavefront::exec
void exec()
Definition: wavefront.cc:862
gem5::Wavefront::oldDgpr
std::vector< uint64_t > oldDgpr
Definition: wavefront.hh:212
gem5::Wavefront::ldsChunk
LdsChunk * ldsChunk
Definition: wavefront.hh:223
gem5::Wavefront
Definition: wavefront.hh:60
gem5::Wavefront::isOldestInstLMem
bool isOldestInstLMem()
Definition: wavefront.cc:688
gem5::HSAQueueEntry
Definition: hsa_queue_entry.hh:59
compute_unit.hh
gem5::Wavefront::S_STALLED_SLEEP
@ S_STALLED_SLEEP
Definition: wavefront.hh:74
gem5::Wavefront::stopFetch
bool stopFetch()
Definition: wavefront.cc:727
gem5::Wavefront::gpuISA
TheGpuISA::GPUISA & gpuISA()
Definition: wavefront.hh:289
gem5::Wavefront::WavefrontStats::schOpdNrdyStalls
statistics::Scalar schOpdNrdyStalls
Definition: wavefront.hh:357
gem5::VectorMask
std::bitset< std::numeric_limits< unsigned long long >::digits > VectorMask
Definition: misc.hh:45
gem5::Wavefront::kernId
int kernId
Definition: wavefront.hh:97
misc.hh
gem5::Wavefront::isOldestInstVectorALU
bool isOldestInstVectorALU()
Definition: wavefront.cc:634
gem5::Wavefront::setWaitCnts
void setWaitCnts(int vm_wait_cnt, int exp_wait_cnt, int lgkm_wait_cnt)
Definition: wavefront.cc:1268
gem5::Wavefront::pendingFetch
bool pendingFetch
Definition: wavefront.hh:111
gem5::Wavefront::pc
Addr pc() const
Definition: wavefront.cc:1363
gem5::Wavefront::WavefrontStats::WavefrontStats
WavefrontStats(statistics::Group *parent)
Definition: wavefront.cc:1439
gem5::Wavefront::startSgprIndex
uint32_t startSgprIndex
Definition: wavefront.hh:202
std::vector< Addr >
gem5::Wavefront::lastNonIdleTick
Tick lastNonIdleTick
Definition: wavefront.hh:114
gem5::Wavefront::initRegState
void initRegState(HSAQueueEntry *task, int wgSizeInWorkItems)
Definition: wavefront.cc:117
gem5::Wavefront::reservedVectorRegs
int reservedVectorRegs
Definition: wavefront.hh:194
gem5::Wavefront::S_STOPPED
@ S_STOPPED
Definition: wavefront.hh:66
gem5::Wavefront::WavefrontStats::schCycles
statistics::Scalar schCycles
Definition: wavefront.hh:343
gem5::Wavefront::wgSz
uint32_t wgSz
Definition: wavefront.hh:161
gem5::Wavefront::scalarRdGmReqsInPipe
int scalarRdGmReqsInPipe
Definition: wavefront.hh:188
gem5::Wavefront::oldDgprId
uint32_t oldDgprId
Definition: wavefront.hh:214
gem5::Wavefront::actualWgSz
uint32_t actualWgSz[3]
Definition: wavefront.hh:163
gem5::Wavefront::workGroupSz
uint32_t workGroupSz[3]
Definition: wavefront.hh:158
gem5::Wavefront::_gpuISA
TheGpuISA::GPUISA _gpuISA
Definition: wavefront.hh:300
gem5::Wavefront::_pc
Addr _pc
Definition: wavefront.hh:329
gem5::Wavefront::rawDist
std::unordered_map< int, uint64_t > rawDist
Definition: wavefront.hh:233
gem5::Wavefront::isOldestInstSleep
bool isOldestInstSleep()
Definition: wavefront.cc:588
gem5::Wavefront::workItemId
std::vector< uint32_t > workItemId[3]
Definition: wavefront.hh:154
gem5::Wavefront::flatGmUnitId
int flatGmUnitId
Definition: wavefront.hh:104
gem5::Wavefront::wrLmReqsInPipe
int wrLmReqsInPipe
Definition: wavefront.hh:186
gem5::Wavefront::oldVgprTcnt
uint64_t oldVgprTcnt
Definition: wavefront.hh:209
gem5::Wavefront::clearWaitCnts
void clearWaitCnts()
Definition: wavefront.cc:1313
gem5::Wavefront::wgId
uint32_t wgId
Definition: wavefront.hh:160
gem5::Wavefront::wfId
uint32_t wfId
Definition: wavefront.hh:167
gem5::Wavefront::isGmInstruction
bool isGmInstruction(GPUDynInstPtr ii)
Definition: wavefront.cc:566
gem5::Wavefront::setStatus
void setStatus(status_e newStatus)
Definition: wavefront.cc:518
gem5::Wavefront::maxIbSize
int maxIbSize
Definition: wavefront.hh:107
gem5::Wavefront::start
void start(uint64_t _wfDynId, uint64_t _base_ptr)
Definition: wavefront.cc:555
gem5::ComputeUnit
Definition: compute_unit.hh:201
gem5::Wavefront::WavefrontStats::numTimesBlockedDueRAWDependencies
statistics::Scalar numTimesBlockedDueRAWDependencies
Definition: wavefront.hh:368
gem5::Wavefront::freeRegisterFile
void freeRegisterFile()
Freeing VRF space.
Definition: wavefront.cc:1387
gem5::Wavefront::validateRequestCounters
void validateRequestCounters()
Definition: wavefront.cc:746
gem5::Wavefront::WavefrontStats::schRfAccessStalls
statistics::Scalar schRfAccessStalls
Definition: wavefront.hh:353
gem5::Wavefront::reservedScalarRegs
int reservedScalarRegs
Definition: wavefront.hh:196
gem5::Wavefront::wrGmReqsInPipe
int wrGmReqsInPipe
Definition: wavefront.hh:187
gem5::Wavefront::outstandingReqs
int outstandingReqs
Definition: wavefront.hh:171
sim_object.hh
gem5::Wavefront::isOldestInstGMem
bool isOldestInstGMem()
Definition: wavefront.cc:662
gem5::Wavefront::lgkmInstsIssued
int lgkmInstsIssued
Definition: wavefront.hh:326
gem5::Wavefront::resizeRegFiles
void resizeRegFiles(int num_vregs, int num_sregs)
Definition: wavefront.cc:507
gem5::Wavefront::rdLmReqsInPipe
int rdLmReqsInPipe
Definition: wavefront.hh:184
gem5::Wavefront::oldDgprTcnt
uint64_t oldDgprTcnt
Definition: wavefront.hh:216
gem5::Wavefront::incLGKMInstsIssued
void incLGKMInstsIssued()
Definition: wavefront.cc:1339
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
statistics.hh
gem5::Wavefront::scalarWrGmReqsInPipe
int scalarWrGmReqsInPipe
Definition: wavefront.hh:189
gem5::Wavefront::scalarOutstandingReqsRdGm
int scalarOutstandingReqsRdGm
Definition: wavefront.hh:181
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::Wavefront::scalarMem
int scalarMem
Definition: wavefront.hh:128
gem5::Wavefront::memTraceBusy
int memTraceBusy
Definition: wavefront.hh:191
gem5::Wavefront::wfSlotId
const int wfSlotId
Definition: wavefront.hh:96
gem5::Wavefront::execUnitId
int execUnitId
Definition: wavefront.hh:102
gem5::Wavefront::S_BARRIER
@ S_BARRIER
WF is stalled at a barrier.
Definition: wavefront.hh:92
gem5::Wavefront::scalarOutstandingReqsWrGm
int scalarOutstandingReqsWrGm
Definition: wavefront.hh:183
gpu_dyn_inst.hh
gem5::Wavefront::Wavefront
Wavefront(const Params &p)
Definition: wavefront.cc:48
gem5::Wavefront::~Wavefront
~Wavefront()
Definition: wavefront.cc:513
gem5::Wavefront::expInstsIssued
int expInstsIssued
Definition: wavefront.hh:325
gem5::Wavefront::waitCntsSatisfied
bool waitCntsSatisfied()
Definition: wavefront.cc:1199
gem5::Wavefront::isOldestInstWaitcnt
bool isOldestInstWaitcnt()
Definition: wavefront.cc:602
gem5::LdsChunk
this represents a slice of the overall LDS, intended to be associated with an individual workgroup
Definition: lds_state.hh:56
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::Wavefront::reserveLmResource
void reserveLmResource(GPUDynInstPtr ii)
Definition: wavefront.cc:790
gem5::Wavefront::lastTrace
uint64_t lastTrace
Definition: wavefront.hh:192
gem5::Wavefront::nextInstr
GPUDynInstPtr nextInstr()
Definition: wavefront.cc:1167
gem5::Wavefront::discardFetch
void discardFetch()
Definition: wavefront.cc:1186
gem5::Wavefront::wfDynId
uint64_t wfDynId
Definition: wavefront.hh:226
gem5::Wavefront::computeUnit
ComputeUnit * computeUnit
Definition: wavefront.hh:106
gem5::Wavefront::execMask
VectorMask & execMask()
Definition: wavefront.cc:1375
gem5::Wavefront::barrierId
int barrierId() const
Definition: wavefront.cc:1422
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::Wavefront::initMask
VectorMask initMask
Definition: wavefront.hh:219
gem5::Wavefront::decExpInstsIssued
void decExpInstsIssued()
Definition: wavefront.cc:1351
gem5::Wavefront::Params
WavefrontParams Params
Definition: wavefront.hh:244
gem5::Wavefront::WavefrontStats::numInstrExecuted
statistics::Scalar numInstrExecuted
Definition: wavefront.hh:340
gem5::GPUDynInstPtr
std::shared_ptr< GPUDynInst > GPUDynInstPtr
Definition: misc.hh:49
gem5::Wavefront::decVMemInstsIssued
void decVMemInstsIssued()
Definition: wavefront.cc:1345
gem5::Wavefront::rdGmReqsInPipe
int rdGmReqsInPipe
Definition: wavefront.hh:185
gem5::Wavefront::outstandingReqsWrLm
int outstandingReqsWrLm
Definition: wavefront.hh:175
gem5::Wavefront::hasBarrier
bool hasBarrier() const
Definition: wavefront.cc:1428
gem5::Wavefront::incExpInstsIssued
void incExpInstsIssued()
Definition: wavefront.cc:1333
gem5::Wavefront::decLGKMInstsIssued
void decLGKMInstsIssued()
Definition: wavefront.cc:1357
gem5::Wavefront::S_RETURNING
@ S_RETURNING
Definition: wavefront.hh:68
gem5::Wavefront::vmWaitCnt
int vmWaitCnt
the following are used for waitcnt instructions vmWaitCnt: once set, we wait for the oustanding numbe...
Definition: wavefront.hh:321
gem5::Wavefront::reserveResources
std::vector< int > reserveResources()
Definition: wavefront.cc:808
gem5::Wavefront::init
virtual void init()
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: wavefront.cc:102
gem5::Wavefront::globalMem
int globalMem
Definition: wavefront.hh:126
gem5::Wavefront::outstandingReqsRdLm
int outstandingReqsRdLm
Definition: wavefront.hh:179
gem5::Wavefront::gridSz
uint32_t gridSz[3]
Definition: wavefront.hh:159
types.hh
gem5::Wavefront::actualWgSzTotal
uint32_t actualWgSzTotal
Definition: wavefront.hh:164
gem5::Wavefront::lgkmWaitCnt
int lgkmWaitCnt
Definition: wavefront.hh:323
gem5::Wavefront::scalarAlu
int scalarAlu
Definition: wavefront.hh:121
gem5::Wavefront::S_WAITCNT
@ S_WAITCNT
wavefront has unsatisfied wait counts
Definition: wavefront.hh:88
gem5::Wavefront::WavefrontStats
Definition: wavefront.hh:334
std::deque< GPUDynInstPtr >
logging.hh
gem5::statistics::Group
Statistics container.
Definition: group.hh:93
gem5::Wavefront::maxVgprs
uint32_t maxVgprs
Definition: wavefront.hh:131
gem5::Wavefront::outstandingReqsWrGm
int outstandingReqsWrGm
Definition: wavefront.hh:173
gem5::Wavefront::isOldestInstScalarALU
bool isOldestInstScalarALU()
Definition: wavefront.cc:619
gem5::Wavefront::WavefrontStats::readsPerWrite
statistics::Distribution readsPerWrite
Definition: wavefront.hh:376
gem5::Wavefront::instructionBuffer
std::deque< GPUDynInstPtr > instructionBuffer
Definition: wavefront.hh:109
gem5::Wavefront::isLmInstruction
bool isLmInstruction(GPUDynInstPtr ii)
Definition: wavefront.cc:577
gem5::Wavefront::dispatchId
uint32_t dispatchId
Definition: wavefront.hh:169
gem5::Wavefront::stats
gem5::Wavefront::WavefrontStats stats
gem5::Wavefront::outstandingReqsRdGm
int outstandingReqsRdGm
Definition: wavefront.hh:177
gem5::Wavefront::sleepCnt
int sleepCnt
Definition: wavefront.hh:327
gem5::Wavefront::setParent
void setParent(ComputeUnit *cu)
Definition: wavefront.hh:250
gem5::Wavefront::freeResources
void freeResources()
Definition: wavefront.cc:741
dispatcher.hh
gem5::Wavefront::isOldestInstPrivMem
bool isOldestInstPrivMem()
Definition: wavefront.cc:701
gem5::Wavefront::status_e
status_e
Definition: wavefront.hh:63
gem5::Wavefront::sleepDone
bool sleepDone()
Definition: wavefront.cc:1242
gem5::Wavefront::incVMemInstsIssued
void incVMemInstsIssued()
Definition: wavefront.cc:1327
gem5::Wavefront::getStatus
status_e getStatus()
Definition: wavefront.hh:137
gem5::Wavefront::WavefrontStats::schResourceStalls
statistics::Scalar schResourceStalls
Definition: wavefront.hh:355
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::Wavefront::startVgprIndex
uint32_t startVgprIndex
Definition: wavefront.hh:199
gem5::Wavefront::context
uint8_t * context
Definition: wavefront.hh:242
gem5::Wavefront::oldVgprId
uint32_t oldVgprId
Definition: wavefront.hh:207
gem5::Wavefront::barId
int barId
Definition: wavefront.hh:331
gem5::Wavefront::scalarAluGlobalIdx
int scalarAluGlobalIdx
Definition: wavefront.hh:125
gem5::Wavefront::WavefrontStats::numTimesBlockedDueWAXDependencies
statistics::Scalar numTimesBlockedDueWAXDependencies
Definition: wavefront.hh:365
gem5::Wavefront::WavefrontStats::vecRawDistance
statistics::Distribution vecRawDistance
Definition: wavefront.hh:372
gem5::Wavefront::lastInstExec
uint64_t lastInstExec
Definition: wavefront.hh:229
gem5::Wavefront::reserveGmResource
void reserveGmResource(GPUDynInstPtr ii)
Definition: wavefront.cc:760
gem5::Wavefront::WavefrontStats::schLdsArbStalls
statistics::Scalar schLdsArbStalls
Definition: wavefront.hh:361
gem5::Wavefront::isOldestInstScalarMem
bool isOldestInstScalarMem()
Definition: wavefront.cc:675
gem5::Wavefront::localMem
int localMem
Definition: wavefront.hh:127
gem5::Wavefront::maxDynWaveId
uint32_t maxDynWaveId
Definition: wavefront.hh:168
gem5::Wavefront::workGroupId
uint32_t workGroupId[3]
Definition: wavefront.hh:157
gem5::Wavefront::dropFetch
bool dropFetch
Definition: wavefront.hh:112
gem5::Wavefront::status
status_e status
Definition: wavefront.hh:328
gem5::Wavefront::simdId
const int simdId
Definition: wavefront.hh:99
lds_state.hh

Generated on Wed May 4 2022 12:13:59 for gem5 by doxygen 1.8.17