gem5  v21.1.0.2
simple_memobj.cc
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28 
30 
31 #include "base/trace.hh"
32 #include "debug/SimpleMemobj.hh"
33 
34 namespace gem5
35 {
36 
37 SimpleMemobj::SimpleMemobj(const SimpleMemobjParams &params) :
38  SimObject(params),
39  instPort(params.name + ".inst_port", this),
40  dataPort(params.name + ".data_port", this),
41  memPort(params.name + ".mem_side", this),
42  blocked(false)
43 {
44 }
45 
46 Port &
47 SimpleMemobj::getPort(const std::string &if_name, PortID idx)
48 {
49  panic_if(idx != InvalidPortID, "This object doesn't support vector ports");
50 
51  // This is the name from the Python SimObject declaration (SimpleMemobj.py)
52  if (if_name == "mem_side") {
53  return memPort;
54  } else if (if_name == "inst_port") {
55  return instPort;
56  } else if (if_name == "data_port") {
57  return dataPort;
58  } else {
59  // pass it along to our super class
60  return SimObject::getPort(if_name, idx);
61  }
62 }
63 
64 void
66 {
67  // Note: This flow control is very simple since the memobj is blocking.
68 
69  panic_if(blockedPacket != nullptr, "Should never try to send if blocked!");
70 
71  // If we can't send the packet across the port, store it for later.
72  if (!sendTimingResp(pkt)) {
73  blockedPacket = pkt;
74  }
75 }
76 
79 {
80  return owner->getAddrRanges();
81 }
82 
83 void
85 {
86  if (needRetry && blockedPacket == nullptr) {
87  // Only send a retry if the port is now completely free
88  needRetry = false;
89  DPRINTF(SimpleMemobj, "Sending retry req for %d\n", id);
90  sendRetryReq();
91  }
92 }
93 
94 void
96 {
97  // Just forward to the memobj.
98  return owner->handleFunctional(pkt);
99 }
100 
101 bool
103 {
104  // Just forward to the memobj.
105  if (!owner->handleRequest(pkt)) {
106  needRetry = true;
107  return false;
108  } else {
109  return true;
110  }
111 }
112 
113 void
115 {
116  // We should have a blocked packet if this function is called.
117  assert(blockedPacket != nullptr);
118 
119  // Grab the blocked packet.
120  PacketPtr pkt = blockedPacket;
121  blockedPacket = nullptr;
122 
123  // Try to resend it. It's possible that it fails again.
124  sendPacket(pkt);
125 }
126 
127 void
129 {
130  // Note: This flow control is very simple since the memobj is blocking.
131 
132  panic_if(blockedPacket != nullptr, "Should never try to send if blocked!");
133 
134  // If we can't send the packet across the port, store it for later.
135  if (!sendTimingReq(pkt)) {
136  blockedPacket = pkt;
137  }
138 }
139 
140 bool
142 {
143  // Just forward to the memobj.
144  return owner->handleResponse(pkt);
145 }
146 
147 void
149 {
150  // We should have a blocked packet if this function is called.
151  assert(blockedPacket != nullptr);
152 
153  // Grab the blocked packet.
154  PacketPtr pkt = blockedPacket;
155  blockedPacket = nullptr;
156 
157  // Try to resend it. It's possible that it fails again.
158  sendPacket(pkt);
159 }
160 
161 void
163 {
164  owner->sendRangeChange();
165 }
166 
167 bool
169 {
170  if (blocked) {
171  // There is currently an outstanding request. Stall.
172  return false;
173  }
174 
175  DPRINTF(SimpleMemobj, "Got request for addr %#x\n", pkt->getAddr());
176 
177  // This memobj is now blocked waiting for the response to this packet.
178  blocked = true;
179 
180  // Simply forward to the memory port
181  memPort.sendPacket(pkt);
182 
183  return true;
184 }
185 
186 bool
188 {
189  assert(blocked);
190  DPRINTF(SimpleMemobj, "Got response for addr %#x\n", pkt->getAddr());
191 
192  // The packet is now done. We're about to put it in the port, no need for
193  // this object to continue to stall.
194  // We need to free the resource before sending the packet in case the CPU
195  // tries to send another request immediately (e.g., in the same callchain).
196  blocked = false;
197 
198  // Simply forward to the memory port
199  if (pkt->req->isInstFetch()) {
200  instPort.sendPacket(pkt);
201  } else {
202  dataPort.sendPacket(pkt);
203  }
204 
205  // For each of the cpu ports, if it needs to send a retry, it should do it
206  // now since this memory object may be unblocked now.
209 
210  return true;
211 }
212 
213 void
215 {
216  // Just pass this on to the memory side to handle for now.
217  memPort.sendFunctional(pkt);
218 }
219 
222 {
223  DPRINTF(SimpleMemobj, "Sending new ranges\n");
224  // Just use the same ranges as whatever is on the memory side.
225  return memPort.getAddrRanges();
226 }
227 
228 void
230 {
233 }
234 
235 } // namespace gem5
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
gem5::SimObject::getPort
virtual Port & getPort(const std::string &if_name, PortID idx=InvalidPortID)
Get a port with a given name and index.
Definition: sim_object.cc:126
gem5::SimpleMemobj::CPUSidePort::recvTimingReq
bool recvTimingReq(PacketPtr pkt) override
Receive a timing request from the request port.
Definition: simple_memobj.cc:102
gem5::SimpleMemobj::sendRangeChange
void sendRangeChange()
Tell the CPU side to ask for our memory ranges.
Definition: simple_memobj.cc:229
gem5::Packet::req
RequestPtr req
A pointer to the original request.
Definition: packet.hh:366
gem5::SimpleMemobj::SimpleMemobj
SimpleMemobj(const SimpleMemobjParams &params)
constructor
Definition: simple_memobj.cc:37
simple_memobj.hh
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
gem5::SimpleMemobj::CPUSidePort::blockedPacket
PacketPtr blockedPacket
If we tried to send a packet and it was blocked, store it here.
Definition: simple_memobj.hh:64
gem5::SimpleMemobj::CPUSidePort::getAddrRanges
AddrRangeList getAddrRanges() const override
Get a list of the non-overlapping address ranges the owner is responsible for.
Definition: simple_memobj.cc:78
gem5::SimpleMemobj::CPUSidePort::sendPacket
void sendPacket(PacketPtr pkt)
Send a packet across this port.
Definition: simple_memobj.cc:65
gem5::SimpleMemobj::handleResponse
bool handleResponse(PacketPtr pkt)
Handle the respone from the memory side.
Definition: simple_memobj.cc:187
gem5::SimpleMemobj::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: simple_memobj.cc:47
gem5::RequestPort::sendFunctional
void sendFunctional(PacketPtr pkt) const
Send a functional request packet, where the data is instantly updated everywhere in the memory system...
Definition: port.hh:485
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::SimpleMemobj::MemSidePort::recvRangeChange
void recvRangeChange() override
Called to receive an address range change from the peer responder port.
Definition: simple_memobj.cc:162
gem5::SimpleMemobj::memPort
MemSidePort memPort
Instantiation of the memory-side port.
Definition: simple_memobj.hh:228
gem5::SimpleMemobj::MemSidePort::sendPacket
void sendPacket(PacketPtr pkt)
Send a packet across this port.
Definition: simple_memobj.cc:128
gem5::ResponsePort::sendTimingResp
bool sendTimingResp(PacketPtr pkt)
Attempt to send a timing response to the request port by calling its corresponding receive function.
Definition: port.hh:370
gem5::RequestPort::getAddrRanges
AddrRangeList getAddrRanges() const
Get the address ranges of the connected responder port.
Definition: port.cc:151
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::SimpleMemobj::handleRequest
bool handleRequest(PacketPtr pkt)
Handle the request from the CPU side.
Definition: simple_memobj.cc:168
name
const std::string & name()
Definition: trace.cc:49
gem5::ResponsePort::sendRangeChange
void sendRangeChange() const
Called by the owner to send a range change.
Definition: port.hh:296
gem5::SimpleMemobj::handleFunctional
void handleFunctional(PacketPtr pkt)
Handle a packet functionally.
Definition: simple_memobj.cc:214
gem5::SimpleMemobj::MemSidePort::recvReqRetry
void recvReqRetry() override
Called by the response port if sendTimingReq was called on this request port (causing recvTimingReq t...
Definition: simple_memobj.cc:148
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:203
gem5::SimpleMemobj::getAddrRanges
AddrRangeList getAddrRanges() const
Return the address ranges this memobj is responsible for.
Definition: simple_memobj.cc:221
gem5::SimpleMemobj::blocked
bool blocked
True if this is currently blocked waiting for a response.
Definition: simple_memobj.hh:231
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::SimpleMemobj::CPUSidePort::recvFunctional
void recvFunctional(PacketPtr pkt) override
Receive a functional request packet from the request port.
Definition: simple_memobj.cc:95
gem5::SimpleMemobj::CPUSidePort::trySendRetry
void trySendRetry()
Send a retry to the peer port only if it is needed.
Definition: simple_memobj.cc:84
trace.hh
gem5::SimpleMemobj::MemSidePort::recvTimingResp
bool recvTimingResp(PacketPtr pkt) override
Receive a timing response from the response port.
Definition: simple_memobj.cc:141
gem5::SimpleMemobj::instPort
CPUSidePort instPort
Instantiation of the CPU-side ports.
Definition: simple_memobj.hh:224
std::list< AddrRange >
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:781
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::SimpleMemobj::dataPort
CPUSidePort dataPort
Definition: simple_memobj.hh:225
gem5::SimpleMemobj
A very simple memory object.
Definition: simple_memobj.hh:45
gem5::SimpleMemobj::CPUSidePort::recvRespRetry
void recvRespRetry() override
Called by the request port if sendTimingResp was called on this response port (causing recvTimingResp...
Definition: simple_memobj.cc:114

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