gem5 v24.0.0.0
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fs_workload.hh
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1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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27 */
28
29#ifndef __ARCH_SPARC_FS_WORKLOAD_HH__
30#define __ARCH_SPARC_FS_WORKLOAD_HH__
31
32#include "arch/sparc/faults.hh"
34#include "params/SparcFsWorkload.hh"
35#include "sim/workload.hh"
36
37namespace gem5
38{
39
40namespace SparcISA
41{
42
43class FsWorkload : public Workload
44{
45 protected:
47
48 public:
49 PARAMS(SparcFsWorkload);
50 FsWorkload(const SparcFsWorkloadParams &params) : Workload(params) {}
51 void initState() override;
52
53 void
54 setSystem(System *sys) override
55 {
58 params().remote_gdb_port, system);
59 }
60
61 Addr
62 getEntry() const override
63 {
64 Addr pc, npc;
65 getREDVector(0x001, pc, npc);
66 return pc;
67 }
68 loader::Arch getArch() const override { return loader::SPARC64; }
69 ByteOrder byteOrder() const override { return ByteOrder::big; }
70
72 symtab(ThreadContext *tc) override
73 {
74 return defaultSymtab;
75 }
76
77 bool
78 insertSymbol(const loader::Symbol &symbol) override
79 {
80 return defaultSymtab.insert(symbol);
81 }
82};
83
84} // namespace SparcISA
85} // namespace gem5
86
87#endif // __ARCH_SPARC_FS_WORKLOAD_HH__
static BaseRemoteGDB * build(ListenSocketConfig listen_config, Args... args)
ByteOrder byteOrder() const override
bool insertSymbol(const loader::Symbol &symbol) override
PARAMS(SparcFsWorkload)
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
FsWorkload(const SparcFsWorkloadParams &params)
Addr getEntry() const override
loader::SymbolTable defaultSymtab
void setSystem(System *sys) override
const loader::SymbolTable & symtab(ThreadContext *tc) override
loader::Arch getArch() const override
ThreadContext is the external interface to all thread state for anything outside of the CPU.
BaseRemoteGDB * gdb
Definition workload.hh:77
virtual void setSystem(System *sys)
Definition workload.hh:88
System * system
Definition workload.hh:81
bool insert(const Symbol &symbol)
Insert a new symbol in the table if it does not already exist.
Definition symtab.cc:66
const Params & params() const
Bitfield< 4 > pc
void getREDVector(RegVal TT, Addr &PC, Addr &NPC)
Definition faults.cc:470
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147

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