gem5  v22.1.0.0
watchdog_sp805.hh
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37 
38 #ifndef __DEV_ARM_WATCHDOG_SP805_HH__
39 #define __DEV_ARM_WATCHDOG_SP805_HH__
40 
41 #include "dev/arm/amba_device.hh"
42 
43 namespace gem5
44 {
45 
46 struct Sp805Params;
47 
55 class Sp805 : public AmbaIntDevice
56 {
57  public:
58  Sp805(const Sp805Params &params);
59 
60  void serialize(CheckpointOut &cp) const override;
61  void unserialize(CheckpointIn &cp) override;
62 
63  protected:
64  Tick read(PacketPtr pkt) override;
65  Tick write(PacketPtr pkt) override;
66 
67  private:
68  enum Offset : Addr
69  {
70  WDOGLOAD = 0x000,
71  WDOGVALUE = 0x004,
72  WDOGCONTROL = 0x008,
73  WDOGINTCLR = 0x00c,
74  WDOGRIS = 0x010,
75  WDOGMIS = 0x014,
76  // 0x018 - 0xbfc -> Reserved
77  WDOGLOCK = 0xc00,
78  // 0xc04 - 0xefc -> Reserved
79  WDOGITCR = 0xf00,
80  WDOGITOP = 0xf04,
81  // 0xf08 - 0xfdc -> Reserved
82  // 0xfe0 - 0xfff -> CoreSight / Peripheral ID (AMBA ID)
83  };
84 
86  uint32_t timeoutInterval;
87 
90 
92  uint32_t persistedValue;
93 
95  bool enabled;
96 
99 
102 
105 
108 
110  uint32_t value(void) const;
111 
113  void timeoutExpired(void);
114 
116  void restartCounter(void);
117 
119  void stopCounter(void);
120 
125  void sendInt(void);
126 
128  void clearInt(void);
129 
131  static constexpr uint32_t WDOGLOCK_MAGIC = 0x1acce551;
132 };
133 
134 } // namespace gem5
135 
136 #endif // __DEV_ARM_WATCHDOG_SP805_HH__
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
bool integrationTestEnabled
Indicates if integration test harness is enabled.
uint32_t value(void) const
Returns the current counter value.
uint32_t persistedValue
Value as persisted when the watchdog is stopped.
static constexpr uint32_t WDOGLOCK_MAGIC
If written into WdogLock, registers are unlocked for writes.
bool resetEnabled
Indicates if reset behaviour is enabled when counter reaches 0.
void restartCounter(void)
Restarts the counter to the current timeout interval.
void stopCounter(void)
Stops the counter when watchdog becomes disabled.
void clearInt(void)
Clears any active interrupts.
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
void serialize(CheckpointOut &cp) const override
Serialize an object.
uint32_t timeoutInterval
Timeout interval (in cycles) as specified in WdogLoad.
void sendInt(void)
Raises an interrupt.
void unserialize(CheckpointIn &cp) override
Unserialize an object.
bool enabled
Indicates if watchdog (counter and interrupt) is enabled.
Tick timeoutStartTick
Timeout start tick to keep track of the counter value.
void timeoutExpired(void)
Triggered when value reaches 0.
bool writeAccessEnabled
Indicates if write access to registers is enabled.
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
EventFunctionWrapper timeoutEvent
Timeout event, triggered when the counter value reaches 0.
Sp805(const Sp805Params &params)
const Params & params() const
Definition: sim_object.hh:176
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
std::ostream CheckpointOut
Definition: serialize.hh:66
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint64_t Tick
Tick count type.
Definition: types.hh:58

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