interrupts.hh File Reference

#include "arch/generic/interrupts.hh"
#include "arch/x86/faults.hh"
#include "arch/x86/intmessage.hh"
#include "arch/x86/regs/apic.hh"
#include "base/bitfield.hh"
#include "cpu/thread_context.hh"
#include "dev/intpin.hh"
#include "dev/io_device.hh"
#include "dev/x86/intdev.hh"
#include "params/X86LocalApic.hh"
#include "sim/eventq.hh"

Go to the source code of this file.

Classes
class	gem5::X86ISA::Interrupts

Namespaces
	gem5
	Reference material can be found at the JEDEC website: UFS standard http://www.jedec.org/standards-documents/results/jesd220 UFS HCI specification http://www.jedec.org/standards-documents/results/jesd223.
	gem5::X86ISA
	This is exposed globally, independent of the ISA.

Functions
int	gem5::divideFromConf (uint32_t conf)
ApicRegIndex	gem5::X86ISA::decodeAddr (Addr paddr)