gem5  v21.1.0.2
utility.cc
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38 
39 #include "arch/x86/utility.hh"
40 
41 #include "arch/x86/interrupts.hh"
42 #include "arch/x86/mmu.hh"
43 #include "arch/x86/regs/ccr.hh"
44 #include "arch/x86/regs/float.hh"
45 #include "arch/x86/regs/int.hh"
46 #include "arch/x86/regs/misc.hh"
47 #include "arch/x86/x86_traits.hh"
48 #include "cpu/base.hh"
49 #include "fputils/fp80.h"
50 
51 namespace gem5
52 {
53 
54 namespace X86ISA
55 {
56 
57 uint64_t
59 {
60  const uint64_t ncc_flags(tc->readMiscRegNoEffect(MISCREG_RFLAGS));
61  const uint64_t cc_flags(tc->readCCReg(X86ISA::CCREG_ZAPS));
62  const uint64_t cfof_bits(tc->readCCReg(X86ISA::CCREG_CFOF));
63  const uint64_t df_bit(tc->readCCReg(X86ISA::CCREG_DF));
64  // ecf (PSEUDO(3)) & ezf (PSEUDO(4)) are only visible to
65  // microcode, so we can safely ignore them.
66 
67  // Reconstruct the real rflags state, mask out internal flags, and
68  // make sure reserved bits have the expected values.
69  return ((ncc_flags | cc_flags | cfof_bits | df_bit) & 0x3F7FD5)
70  | 0x2;
71 }
72 
73 void
74 setRFlags(ThreadContext *tc, uint64_t val)
75 {
79 
80  // Internal microcode registers (ECF & EZF)
83 
84  // Update the RFLAGS misc reg with whatever didn't go into the
85  // magic registers.
87 }
88 
89 uint8_t
90 convX87TagsToXTags(uint16_t ftw)
91 {
92  uint8_t ftwx(0);
93  for (int i = 0; i < 8; ++i) {
94  // Extract the tag for the current element on the FP stack
95  const unsigned tag((ftw >> (2 * i)) & 0x3);
96 
97  /*
98  * Check the type of the current FP element. Valid values are:
99  * 0 == Valid
100  * 1 == Zero
101  * 2 == Special (Nan, unsupported, infinity, denormal)
102  * 3 == Empty
103  */
104  // The xsave version of the tag word only keeps track of
105  // whether the element is empty or not. Set the corresponding
106  // bit in the ftwx if it's not empty,
107  if (tag != 0x3)
108  ftwx |= 1 << i;
109  }
110 
111  return ftwx;
112 }
113 
114 uint16_t
115 convX87XTagsToTags(uint8_t ftwx)
116 {
117  uint16_t ftw(0);
118  for (int i = 0; i < 8; ++i) {
119  const unsigned xtag(((ftwx >> i) & 0x1));
120 
121  // The xtag for an x87 stack position is 0 for empty stack positions.
122  if (!xtag) {
123  // Set the tag word to 3 (empty) for the current element.
124  ftw |= 0x3 << (2 * i);
125  } else {
126  // TODO: We currently assume that non-empty elements are
127  // valid (0x0), but we should ideally reconstruct the full
128  // state (valid/zero/special).
129  }
130  }
131 
132  return ftw;
133 }
134 
135 uint16_t
136 genX87Tags(uint16_t ftw, uint8_t top, int8_t spm)
137 {
138  const uint8_t new_top((top + spm + 8) % 8);
139 
140  if (spm > 0) {
141  // Removing elements from the stack. Flag the elements as empty.
142  for (int i = top; i != new_top; i = (i + 1 + 8) % 8)
143  ftw |= 0x3 << (2 * i);
144  } else if (spm < 0) {
145  // Adding elements to the stack. Flag the new elements as
146  // valid. We should ideally decode them and "do the right
147  // thing".
148  for (int i = new_top; i != top; i = (i + 1 + 8) % 8)
149  ftw &= ~(0x3 << (2 * i));
150  }
151 
152  return ftw;
153 }
154 
155 double
156 loadFloat80(const void *_mem)
157 {
158  fp80_t fp80;
159  memcpy(fp80.bits, _mem, 10);
160 
161  return fp80_cvtd(fp80);
162 }
163 
164 void
165 storeFloat80(void *_mem, double value)
166 {
167  fp80_t fp80 = fp80_cvfd(value);
168  memcpy(_mem, fp80.bits, 10);
169 }
170 
171 } // namespace X86_ISA
172 } // namespace gem5
gem5::X86ISA::DFBit
@ DFBit
Definition: misc.hh:66
gem5::X86ISA::loadFloat80
double loadFloat80(const void *_mem)
Load an 80-bit float from memory and convert it to double.
Definition: utility.cc:156
x86_traits.hh
mmu.hh
gem5::X86ISA::CCREG_ECF
@ CCREG_ECF
Definition: ccr.hh:53
ccr.hh
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
interrupts.hh
top
Definition: test.h:61
gem5::X86ISA::getRFlags
uint64_t getRFlags(ThreadContext *tc)
Reconstruct the rflags register from the internal gem5 register state.
Definition: utility.cc:58
gem5::X86ISA::CCREG_EZF
@ CCREG_EZF
Definition: ccr.hh:54
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::X86ISA::storeFloat80
void storeFloat80(void *_mem, double value)
Convert and store a double as an 80-bit float.
Definition: utility.cc:165
gem5::ThreadContext::readCCReg
virtual RegVal readCCReg(RegIndex reg_idx) const =0
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
int.hh
gem5::X86ISA::genX87Tags
uint16_t genX87Tags(uint16_t ftw, uint8_t top, int8_t spm)
Generate and updated x87 tag register after a push/pop operation.
Definition: utility.cc:136
utility.hh
gem5::X86ISA::MISCREG_RFLAGS
@ MISCREG_RFLAGS
Definition: misc.hh:140
gem5::ThreadContext::readMiscRegNoEffect
virtual RegVal readMiscRegNoEffect(RegIndex misc_reg) const =0
gem5::X86ISA::convX87XTagsToTags
uint16_t convX87XTagsToTags(uint8_t ftwx)
Convert an x87 xtag word to normal tags format.
Definition: utility.cc:115
gem5::X86ISA::CCREG_CFOF
@ CCREG_CFOF
Definition: ccr.hh:51
gem5::X86ISA::setRFlags
void setRFlags(ThreadContext *tc, uint64_t val)
Set update the rflags register and internal gem5 state.
Definition: utility.cc:74
gem5::X86ISA::convX87TagsToXTags
uint8_t convX87TagsToXTags(uint16_t ftw)
Convert an x87 tag word to abridged tag format.
Definition: utility.cc:90
gem5::X86ISA::CCREG_DF
@ CCREG_DF
Definition: ccr.hh:52
base.hh
gem5::ThreadContext::setMiscReg
virtual void setMiscReg(RegIndex misc_reg, RegVal val)=0
gem5::X86ISA::CCREG_ZAPS
@ CCREG_ZAPS
Definition: ccr.hh:50
gem5::ThreadContext::setCCReg
virtual void setCCReg(RegIndex reg_idx, RegVal val)=0
gem5::X86ISA::cfofMask
const uint32_t cfofMask
Definition: misc.hh:70
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
misc.hh
float.hh
gem5::X86ISA::ccFlagMask
const uint32_t ccFlagMask
Definition: misc.hh:71

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