utility.cc File Reference

#include "arch/arm/utility.hh"
#include <memory>
#include "arch/arm/faults.hh"
#include "arch/arm/isa_traits.hh"
#include "arch/arm/system.hh"
#include "arch/arm/tlb.hh"
#include "arch/arm/vtophys.hh"
#include "cpu/base.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/thread_context.hh"
#include "mem/fs_translating_port_proxy.hh"
#include "sim/full_system.hh"

Go to the source code of this file.

Namespaces
	ArmISA

Functions
uint64_t	ArmISA::getArgument (ThreadContext *tc, int &number, uint16_t size, bool fp)
void	ArmISA::skipFunction (ThreadContext *tc)
static void	ArmISA::copyVecRegs (ThreadContext *src, ThreadContext *dest)
void	ArmISA::copyRegs (ThreadContext *src, ThreadContext *dest)
void	ArmISA::sendEvent (ThreadContext *tc)
	Send an event (SEV) to a specific PE if there isn't already a pending event. More...
bool	ArmISA::inSecureState (ThreadContext *tc)
bool	ArmISA::isSecureBelowEL3 (ThreadContext *tc)
bool	ArmISA::inAArch64 (ThreadContext *tc)
bool	ArmISA::longDescFormatInUse (ThreadContext *tc)
RegVal	ArmISA::readMPIDR (ArmSystem *arm_sys, ThreadContext *tc)
	This helper function is either returing the value of MPIDR_EL1 (by calling getMPIDR), or it is issuing a read to VMPIDR_EL2 (as it happens in virtualized systems) More...
RegVal	ArmISA::getMPIDR (ArmSystem *arm_sys, ThreadContext *tc)
	This helper function is returing the value of MPIDR_EL1. More...
bool	ArmISA::HaveVirtHostExt (ThreadContext *tc)
ExceptionLevel	ArmISA::s1TranslationRegime (ThreadContext *tc, ExceptionLevel el)
bool	ArmISA::HaveSecureEL2Ext (ThreadContext *tc)
bool	ArmISA::IsSecureEL2Enabled (ThreadContext *tc)
bool	ArmISA::EL2Enabled (ThreadContext *tc)
bool	ArmISA::ELIs64 (ThreadContext *tc, ExceptionLevel el)
bool	ArmISA::ELIs32 (ThreadContext *tc, ExceptionLevel el)
bool	ArmISA::ELIsInHost (ThreadContext *tc, ExceptionLevel el)
	Returns true if the current exception level el is executing a Host OS or an application of a Host OS (Armv8.1 Virtualization Host Extensions). More...
std::pair< bool, bool >	ArmISA::ELUsingAArch32K (ThreadContext *tc, ExceptionLevel el)
	This function checks whether selected EL provided as an argument is using the AArch32 ISA. More...
bool	ArmISA::isBigEndian64 (ThreadContext *tc)
bool	ArmISA::badMode32 (ThreadContext *tc, OperatingMode mode)
	badMode is checking if the execution mode provided as an argument is valid and implemented for AArch32 More...
bool	ArmISA::badMode (ThreadContext *tc, OperatingMode mode)
	badMode is checking if the execution mode provided as an argument is valid and implemented. More...
int	ArmISA::computeAddrTop (ThreadContext *tc, bool selbit, bool isInstr, TCR tcr, ExceptionLevel el)
Addr	ArmISA::purifyTaggedAddr (Addr addr, ThreadContext *tc, ExceptionLevel el, TCR tcr, bool isInstr)
	Removes the tag from tagged addresses if that mode is enabled. More...
Addr	ArmISA::purifyTaggedAddr (Addr addr, ThreadContext *tc, ExceptionLevel el, bool isInstr)
Addr	ArmISA::truncPage (Addr addr)
Addr	ArmISA::roundPage (Addr addr)
bool	ArmISA::mcrMrc15TrapToHyp (const MiscRegIndex miscReg, ThreadContext *tc, uint32_t iss)
bool	ArmISA::mcrMrc14TrapToHyp (const MiscRegIndex miscReg, HCR hcr, CPSR cpsr, SCR scr, HDCR hdcr, HSTR hstr, HCPTR hcptr, uint32_t iss)
bool	ArmISA::mcrrMrrc15TrapToHyp (const MiscRegIndex miscReg, CPSR cpsr, SCR scr, HSTR hstr, HCR hcr, uint32_t iss)
bool	ArmISA::decodeMrsMsrBankedReg (uint8_t sysM, bool r, bool &isIntReg, int &regIdx, CPSR cpsr, SCR scr, NSACR nsacr, bool checkSecurity)
bool	ArmISA::SPAlignmentCheckEnabled (ThreadContext *tc)
int	ArmISA::decodePhysAddrRange64 (uint8_t pa_enc)
	Returns the n. More...
uint8_t	ArmISA::encodePhysAddrRange64 (int pa_size)
	Returns the encoding corresponding to the specified n. More...