gem5  v19.0.0.0
•All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Modules Pages
mmapped_ipr.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2006 The Regents of The University of Michigan
3  * Copyright (c) 2007-2008 The Florida State University
4  * Copyright (c) 2009 The University of Edinburgh
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions are
9  * met: redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer;
11  * redistributions in binary form must reproduce the above copyright
12  * notice, this list of conditions and the following disclaimer in the
13  * documentation and/or other materials provided with the distribution;
14  * neither the name of the copyright holders nor the names of its
15  * contributors may be used to endorse or promote products derived from
16  * this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  *
30  * Authors: Ali Saidi
31  * Stephen Hines
32  * Timothy M. Jones
33  */
34 
35 #ifndef __ARCH_POWER_MMAPPED_IPR_HH__
36 #define __ARCH_POWER_MMAPPED_IPR_HH__
37 
44 #include "base/types.hh"
45 
46 class Packet;
47 class ThreadContext;
48 
49 namespace PowerISA
50 {
51 
52 inline Cycles handleIprRead(ThreadContext *, Packet *) { return Cycles(1); }
53 inline Cycles handleIprWrite(ThreadContext *, Packet *) { return Cycles(1); }
54 
55 } // namespace PowerISA
56 
57 #endif // __ARCH_POWER_MMAPPED_IPR_HH__
Cycles
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:83
PowerISA::handleIprRead
Cycles handleIprRead(ThreadContext *, Packet *)
Definition: mmapped_ipr.hh:52
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Definition: thread_context.hh:93
types.hh
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:255
PowerISA::handleIprWrite
Cycles handleIprWrite(ThreadContext *, Packet *)
Definition: mmapped_ipr.hh:53
Generated on Fri Feb 28 2020 16:26:56 for gem5 by doxygen 1.8.13