gem5
v20.1.0.0
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Derived ThreadContext class for use with the O3CPU. More...
#include <cpu.hh>
Public Types | |
typedef Impl::O3CPU | O3CPU |
Public Member Functions | |
bool | schedule (PCEvent *e) override |
bool | remove (PCEvent *e) override |
void | scheduleInstCountEvent (Event *event, Tick count) override |
void | descheduleInstCountEvent (Event *event) override |
Tick | getCurrentInstCount () override |
BaseTLB * | getITBPtr () override |
Returns a pointer to the ITB. More... | |
BaseTLB * | getDTBPtr () override |
Returns a pointer to the DTB. More... | |
CheckerCPU * | getCheckerCpuPtr () override |
BaseISA * | getIsaPtr () override |
TheISA::Decoder * | getDecoderPtr () override |
BaseCPU * | getCpuPtr () override |
Returns a pointer to this CPU. More... | |
int | cpuId () const override |
Reads this CPU's ID. More... | |
uint32_t | socketId () const override |
Reads this CPU's Socket ID. More... | |
ContextID | contextId () const override |
void | setContextId (ContextID id) override |
int | threadId () const override |
Returns this thread's ID number. More... | |
void | setThreadId (int id) override |
System * | getSystemPtr () override |
Returns a pointer to the system. More... | |
Process * | getProcessPtr () override |
Returns a pointer to this thread's process. More... | |
void | setProcessPtr (Process *p) override |
PortProxy & | getPhysProxy () override |
PortProxy & | getVirtProxy () override |
void | initMemProxies (ThreadContext *tc) override |
Status | status () const override |
Returns this thread's status. More... | |
void | setStatus (Status new_status) override |
Sets this thread's status. More... | |
void | activate () override |
Set the status to Active. More... | |
void | suspend () override |
Set the status to Suspended. More... | |
void | halt () override |
Set the status to Halted. More... | |
void | takeOverFrom (ThreadContext *old_context) override |
Takes over execution of a thread from another CPU. More... | |
Tick | readLastActivate () override |
Reads the last tick that this thread was activated on. More... | |
Tick | readLastSuspend () override |
Reads the last tick that this thread was suspended on. More... | |
void | copyArchRegs (ThreadContext *tc) override |
Copies the architectural registers from another TC into this TC. More... | |
void | clearArchRegs () override |
Resets all architectural registers to 0. More... | |
RegVal | readReg (RegIndex reg_idx) |
Reads an integer register. More... | |
RegVal | readIntReg (RegIndex reg_idx) const override |
RegVal | readFloatReg (RegIndex reg_idx) const override |
const VecRegContainer & | readVecReg (const RegId &id) const override |
VecRegContainer & | getWritableVecReg (const RegId &id) override |
Read vector register operand for modification, hierarchical indexing. More... | |
const VecElem & | readVecElem (const RegId ®) const override |
const VecPredRegContainer & | readVecPredReg (const RegId &id) const override |
VecPredRegContainer & | getWritableVecPredReg (const RegId &id) override |
RegVal | readCCReg (RegIndex reg_idx) const override |
void | setIntReg (RegIndex reg_idx, RegVal val) override |
Sets an integer register to a value. More... | |
void | setFloatReg (RegIndex reg_idx, RegVal val) override |
void | setVecReg (const RegId ®, const VecRegContainer &val) override |
void | setVecElem (const RegId ®, const VecElem &val) override |
void | setVecPredReg (const RegId ®, const VecPredRegContainer &val) override |
void | setCCReg (RegIndex reg_idx, RegVal val) override |
TheISA::PCState | pcState () const override |
Reads this thread's PC state. More... | |
void | pcState (const TheISA::PCState &val) override |
Sets this thread's PC state. More... | |
void | pcStateNoRecord (const TheISA::PCState &val) override |
Addr | instAddr () const override |
Reads this thread's PC. More... | |
Addr | nextInstAddr () const override |
Reads this thread's next PC. More... | |
MicroPC | microPC () const override |
Reads this thread's next PC. More... | |
RegVal | readMiscRegNoEffect (RegIndex misc_reg) const override |
Reads a miscellaneous register. More... | |
RegVal | readMiscReg (RegIndex misc_reg) override |
Reads a misc. More... | |
void | setMiscRegNoEffect (RegIndex misc_reg, RegVal val) override |
Sets a misc. More... | |
void | setMiscReg (RegIndex misc_reg, RegVal val) override |
Sets a misc. More... | |
RegId | flattenRegId (const RegId ®Id) const override |
unsigned | readStCondFailures () const override |
Returns the number of consecutive store conditional failures. More... | |
void | setStCondFailures (unsigned sc_failures) override |
Sets the number of consecutive store conditional failures. More... | |
void | syscall () override |
Executes a syscall in SE mode. More... | |
Counter | readFuncExeInst () const override |
Reads the funcExeInst counter. More... | |
void | conditionalSquash () |
check if the cpu is currently in state update mode and squash if not. More... | |
RegVal | readIntRegFlat (RegIndex idx) const override |
void | setIntRegFlat (RegIndex idx, RegVal val) override |
RegVal | readFloatRegFlat (RegIndex idx) const override |
void | setFloatRegFlat (RegIndex idx, RegVal val) override |
const VecRegContainer & | readVecRegFlat (RegIndex idx) const override |
VecRegContainer & | getWritableVecRegFlat (RegIndex idx) override |
Read vector register operand for modification, flat indexing. More... | |
void | setVecRegFlat (RegIndex idx, const VecRegContainer &val) override |
template<typename VecElem > | |
VecLaneT< VecElem, true > | readVecLaneFlat (RegIndex idx, int lId) const |
template<typename LD > | |
void | setVecLaneFlat (int idx, int lId, const LD &val) |
const VecElem & | readVecElemFlat (RegIndex idx, const ElemIndex &elemIndex) const override |
void | setVecElemFlat (RegIndex idx, const ElemIndex &elemIdx, const VecElem &val) override |
const VecPredRegContainer & | readVecPredRegFlat (RegIndex idx) const override |
VecPredRegContainer & | getWritableVecPredRegFlat (RegIndex idx) override |
void | setVecPredRegFlat (RegIndex idx, const VecPredRegContainer &val) override |
RegVal | readCCRegFlat (RegIndex idx) const override |
void | setCCRegFlat (RegIndex idx, RegVal val) override |
void | htmAbortTransaction (uint64_t htm_uid, HtmFailureFaultCause cause) override |
BaseHTMCheckpointPtr & | getHtmCheckpointPtr () override |
void | setHtmCheckpointPtr (BaseHTMCheckpointPtr new_cpt) override |
ConstVecLane8 | readVec8BitLaneReg (const RegId &id) const override |
Vector Register Lane Interfaces. More... | |
ConstVecLane16 | readVec16BitLaneReg (const RegId &id) const override |
Reads source vector 16bit operand. More... | |
ConstVecLane32 | readVec32BitLaneReg (const RegId &id) const override |
Reads source vector 32bit operand. More... | |
ConstVecLane64 | readVec64BitLaneReg (const RegId &id) const override |
Reads source vector 64bit operand. More... | |
void | setVecLane (const RegId ®, const LaneData< LaneSize::Byte > &val) override |
Write a lane of the destination vector register. More... | |
void | setVecLane (const RegId ®, const LaneData< LaneSize::TwoByte > &val) override |
void | setVecLane (const RegId ®, const LaneData< LaneSize::FourByte > &val) override |
void | setVecLane (const RegId ®, const LaneData< LaneSize::EightByte > &val) override |
Public Attributes | |
O3CPU * | cpu |
Pointer to the CPU. More... | |
O3ThreadState< Impl > * | thread |
Pointer to the thread state that this TC corrseponds to. More... | |
Derived ThreadContext class for use with the O3CPU.
It provides the interface for any external objects to access a single thread's state and some general CPU state. Any time external objects try to update state through this interface, the CPU will create an event to squash all in-flight instructions in order to ensure state is maintained correctly. It must be defined specifically for the O3CPU because not all architectural state is located within the O3ThreadState (such as the commit PC, and registers), and specific actions must be taken when using this interface (such as squashing all in-flight instructions when doing a write to this interface).
typedef Impl::O3CPU O3ThreadContext< Impl >::O3CPU |
Definition at line 66 of file thread_context.hh.
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Set the status to Active.
Definition at line 78 of file thread_context_impl.hh.
References ThreadContext::Active, curTick(), and DPRINTF.
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Resets all architectural registers to 0.
Definition at line 167 of file thread_context_impl.hh.
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check if the cpu is currently in state update mode and squash if not.
This function will return true if a trap is pending or if a fault or similar is currently writing to the thread context and doesn't want reset all the state (see noSquashFromTC).
Definition at line 438 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Definition at line 130 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Copies the architectural registers from another TC into this TC.
Definition at line 151 of file thread_context_impl.hh.
References ArmISA::copyRegs(), FullSystem, ThreadContext::pcState(), and ThreadContext::readFuncExeInst().
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Reads this CPU's ID.
Definition at line 125 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu.
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Definition at line 88 of file thread_context.hh.
References MipsISA::event, and O3ThreadContext< Impl >::thread.
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Definition at line 305 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::getWritableVecPredReg(), O3ThreadContext< Impl >::getWritableVecReg(), O3ThreadContext< Impl >::readCCReg(), O3ThreadContext< Impl >::readFloatReg(), O3ThreadContext< Impl >::readIntReg(), O3ThreadContext< Impl >::readReg(), O3ThreadContext< Impl >::readVec16BitLaneReg(), O3ThreadContext< Impl >::readVec32BitLaneReg(), O3ThreadContext< Impl >::readVec64BitLaneReg(), O3ThreadContext< Impl >::readVec8BitLaneReg(), O3ThreadContext< Impl >::readVecElem(), O3ThreadContext< Impl >::readVecPredReg(), O3ThreadContext< Impl >::readVecReg(), O3ThreadContext< Impl >::setCCReg(), O3ThreadContext< Impl >::setFloatReg(), O3ThreadContext< Impl >::setIntReg(), O3ThreadContext< Impl >::setVecElem(), O3ThreadContext< Impl >::setVecLane(), O3ThreadContext< Impl >::setVecPredReg(), and O3ThreadContext< Impl >::setVecReg().
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Definition at line 107 of file thread_context.hh.
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Returns a pointer to this CPU.
Definition at line 122 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu.
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Definition at line 93 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Definition at line 116 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Returns a pointer to the DTB.
Definition at line 105 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu.
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Definition at line 341 of file thread_context_impl.hh.
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Definition at line 110 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Returns a pointer to the ITB.
Definition at line 102 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu.
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Definition at line 146 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Returns a pointer to this thread's process.
Definition at line 142 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Returns a pointer to the system.
Definition at line 139 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu.
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Definition at line 53 of file thread_context_impl.hh.
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Definition at line 299 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), O3ThreadContext< Impl >::getWritableVecPredRegFlat(), and MipsISA::index.
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Definition at line 217 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::getWritableVecPredReg().
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Read vector register operand for modification, hierarchical indexing.
Definition at line 220 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), O3ThreadContext< Impl >::getWritableVecRegFlat(), and MipsISA::index.
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Read vector register operand for modification, flat indexing.
Definition at line 195 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::getWritableVecReg().
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Set the status to Halted.
Definition at line 117 of file thread_context_impl.hh.
References DPRINTF, ThreadContext::Halted, and ThreadContext::Halting.
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Definition at line 331 of file thread_context_impl.hh.
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Definition at line 151 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Reads this thread's PC.
Definition at line 364 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Reads this thread's next PC.
Definition at line 378 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Reads this thread's next PC.
Definition at line 371 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Reads this thread's PC state.
Definition at line 352 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Sets this thread's PC state.
Definition at line 287 of file thread_context_impl.hh.
References X86ISA::val.
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Definition at line 296 of file thread_context_impl.hh.
References X86ISA::val.
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Definition at line 305 of file thread_context.hh.
References CCRegClass, O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, and O3ThreadContext< Impl >::readCCRegFlat().
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Definition at line 224 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::readCCReg().
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Definition at line 204 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), FloatRegClass, MipsISA::index, and O3ThreadContext< Impl >::readFloatRegFlat().
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Definition at line 181 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::readFloatReg().
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Reads the funcExeInst counter.
Definition at line 430 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Definition at line 197 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, IntRegClass, and O3ThreadContext< Impl >::readIntRegFlat().
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Definition at line 174 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::readIntReg(), and O3ThreadContext< Impl >::readReg().
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Reads the last tick that this thread was activated on.
Definition at line 137 of file thread_context_impl.hh.
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Reads the last tick that this thread was suspended on.
Definition at line 144 of file thread_context_impl.hh.
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Reads a misc.
register, including any side-effects the read might have as defined by the architecture.
Definition at line 393 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Reads a miscellaneous register.
Definition at line 385 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Reads an integer register.
Definition at line 191 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, IntRegClass, and O3ThreadContext< Impl >::readIntRegFlat().
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Returns the number of consecutive store conditional failures.
Definition at line 410 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Reads source vector 16bit operand.
Definition at line 237 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), and MipsISA::index.
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Reads source vector 32bit operand.
Definition at line 245 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), and MipsISA::index.
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Reads source vector 64bit operand.
Definition at line 253 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), and MipsISA::index.
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Vector Register Lane Interfaces.
Reads source vector 8bit operand.
Definition at line 229 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), and MipsISA::index.
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Definition at line 287 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, O3ThreadContext< Impl >::readVecElemFlat(), and X86ISA::reg.
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Definition at line 202 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::readVecElem().
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Definition at line 457 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Definition at line 293 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, and O3ThreadContext< Impl >::readVecPredRegFlat().
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Definition at line 210 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::readVecPredReg().
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Definition at line 211 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, and O3ThreadContext< Impl >::readVecRegFlat().
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Definition at line 188 of file thread_context_impl.hh.
Referenced by O3ThreadContext< Impl >::readVecReg().
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Definition at line 77 of file thread_context.hh.
References ArmISA::e, and O3ThreadContext< Impl >::thread.
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Definition at line 72 of file thread_context.hh.
References ArmISA::e, and O3ThreadContext< Impl >::thread.
Referenced by FullO3CPU< O3CPUImpl >::scheduleTickEvent().
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Definition at line 83 of file thread_context.hh.
References X86ISA::count, MipsISA::event, and O3ThreadContext< Impl >::thread.
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Definition at line 345 of file thread_context.hh.
References CCRegClass, O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, O3ThreadContext< Impl >::setCCRegFlat(), and X86ISA::val.
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Definition at line 278 of file thread_context_impl.hh.
References X86ISA::val.
Referenced by O3ThreadContext< Impl >::setCCReg().
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Definition at line 132 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Definition at line 319 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), FloatRegClass, MipsISA::index, O3ThreadContext< Impl >::setFloatRegFlat(), and X86ISA::val.
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Definition at line 240 of file thread_context_impl.hh.
References X86ISA::val.
Referenced by O3ThreadContext< Impl >::setFloatReg().
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Definition at line 348 of file thread_context_impl.hh.
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Sets an integer register to a value.
Definition at line 313 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, IntRegClass, O3ThreadContext< Impl >::setIntRegFlat(), and X86ISA::val.
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Definition at line 231 of file thread_context_impl.hh.
References X86ISA::val.
Referenced by O3ThreadContext< Impl >::setIntReg().
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Sets a misc.
register, including any side-effects the write might have as defined by the architecture.
Definition at line 321 of file thread_context_impl.hh.
References X86ISA::val.
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Sets a misc.
register.
Definition at line 312 of file thread_context_impl.hh.
References X86ISA::val.
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Definition at line 144 of file thread_context.hh.
References MipsISA::p, and O3ThreadContext< Impl >::thread.
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Sets this thread's status.
Definition at line 161 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Sets the number of consecutive store conditional failures.
Definition at line 417 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Definition at line 136 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Definition at line 332 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, X86ISA::reg, O3ThreadContext< Impl >::setVecElemFlat(), and X86ISA::val.
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Definition at line 259 of file thread_context_impl.hh.
References X86ISA::val.
Referenced by O3ThreadContext< Impl >::setVecElem().
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Write a lane of the destination vector register.
Definition at line 261 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, X86ISA::reg, O3ThreadContext< Impl >::setVecLaneFlat(), and X86ISA::val.
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Definition at line 279 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, X86ISA::reg, O3ThreadContext< Impl >::setVecLaneFlat(), and X86ISA::val.
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Definition at line 273 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, X86ISA::reg, O3ThreadContext< Impl >::setVecLaneFlat(), and X86ISA::val.
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Definition at line 267 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, X86ISA::reg, O3ThreadContext< Impl >::setVecLaneFlat(), and X86ISA::val.
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Definition at line 465 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, O3ThreadContext< Impl >::thread, and X86ISA::val.
Referenced by O3ThreadContext< Impl >::setVecLane().
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Definition at line 338 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, X86ISA::reg, O3ThreadContext< Impl >::setVecPredRegFlat(), and X86ISA::val.
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Definition at line 268 of file thread_context_impl.hh.
References X86ISA::val.
Referenced by O3ThreadContext< Impl >::setVecPredReg().
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Definition at line 326 of file thread_context.hh.
References O3ThreadContext< Impl >::flattenRegId(), MipsISA::index, X86ISA::reg, O3ThreadContext< Impl >::setVecRegFlat(), and X86ISA::val.
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Definition at line 249 of file thread_context_impl.hh.
References X86ISA::val.
Referenced by O3ThreadContext< Impl >::setVecReg().
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Reads this CPU's Socket ID.
Definition at line 128 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu.
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Returns this thread's status.
Definition at line 157 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
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Set the status to Suspended.
Definition at line 95 of file thread_context_impl.hh.
References curTick(), DPRINTF, and ThreadContext::Suspended.
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Executes a syscall in SE mode.
Definition at line 424 of file thread_context.hh.
References O3ThreadContext< Impl >::cpu, and O3ThreadContext< Impl >::thread.
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Takes over execution of a thread from another CPU.
Definition at line 60 of file thread_context_impl.hh.
References ThreadContext::getDecoderPtr(), ThreadContext::readFuncExeInst(), and takeOverFrom().
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Returns this thread's ID number.
Definition at line 135 of file thread_context.hh.
References O3ThreadContext< Impl >::thread.
O3CPU* O3ThreadContext< Impl >::cpu |
Pointer to the CPU.
Definition at line 69 of file thread_context.hh.
Referenced by O3ThreadContext< Impl >::conditionalSquash(), O3ThreadContext< Impl >::cpuId(), O3ThreadContext< Impl >::getCpuPtr(), O3ThreadContext< Impl >::getDecoderPtr(), O3ThreadContext< Impl >::getDTBPtr(), O3ThreadContext< Impl >::getIsaPtr(), O3ThreadContext< Impl >::getITBPtr(), O3ThreadContext< Impl >::getSystemPtr(), O3ThreadContext< Impl >::instAddr(), O3ThreadContext< Impl >::microPC(), O3ThreadContext< Impl >::nextInstAddr(), O3ThreadContext< Impl >::pcState(), O3ThreadContext< Impl >::readMiscReg(), O3ThreadContext< Impl >::readMiscRegNoEffect(), O3ThreadContext< Impl >::readVecLaneFlat(), O3ThreadContext< Impl >::setVecLaneFlat(), O3ThreadContext< Impl >::socketId(), and O3ThreadContext< Impl >::syscall().
O3ThreadState<Impl>* O3ThreadContext< Impl >::thread |
Pointer to the thread state that this TC corrseponds to.
Definition at line 99 of file thread_context.hh.
Referenced by O3ThreadContext< Impl >::conditionalSquash(), O3ThreadContext< Impl >::contextId(), O3ThreadContext< Impl >::descheduleInstCountEvent(), O3ThreadContext< Impl >::getCurrentInstCount(), O3ThreadContext< Impl >::getDecoderPtr(), O3ThreadContext< Impl >::getIsaPtr(), O3ThreadContext< Impl >::getPhysProxy(), O3ThreadContext< Impl >::getProcessPtr(), O3ThreadContext< Impl >::initMemProxies(), O3ThreadContext< Impl >::instAddr(), O3ThreadContext< Impl >::microPC(), O3ThreadContext< Impl >::nextInstAddr(), O3ThreadContext< Impl >::pcState(), O3ThreadContext< Impl >::readFuncExeInst(), O3ThreadContext< Impl >::readMiscReg(), O3ThreadContext< Impl >::readMiscRegNoEffect(), O3ThreadContext< Impl >::readStCondFailures(), O3ThreadContext< Impl >::readVecLaneFlat(), O3ThreadContext< Impl >::remove(), O3ThreadContext< Impl >::schedule(), O3ThreadContext< Impl >::scheduleInstCountEvent(), O3ThreadContext< Impl >::setContextId(), O3ThreadContext< Impl >::setProcessPtr(), O3ThreadContext< Impl >::setStatus(), O3ThreadContext< Impl >::setStCondFailures(), O3ThreadContext< Impl >::setThreadId(), O3ThreadContext< Impl >::setVecLaneFlat(), O3ThreadContext< Impl >::status(), O3ThreadContext< Impl >::syscall(), and O3ThreadContext< Impl >::threadId().