gem5
v21.2.1.1
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#include <evs.hh>
Public Member Functions | |
ScxEvsCortexA76 (const Params &p) | |
ScxEvsCortexA76 (const sc_core::sc_module_name &mod_name, const Params &p) | |
void | before_end_of_elaboration () override |
Port & | gem5_getPort (const std::string &if_name, int idx) override |
void | end_of_elaboration () override |
void | start_of_simulation () override |
void | sendFunc (PacketPtr pkt) override |
void | setClkPeriod (Tick clk_period) override |
void | setSysCounterFrq (uint64_t sys_counter_frq) override |
void | setCluster (SimObject *cluster) override |
void | setResetAddr (int core, Addr addr, bool secure) override |
Private Types | |
using | Base = typename Types::Base |
using | Params = typename Types::Params |
using | TlmGicTarget = sc_gem5::TlmTargetBaseWrapper< 64, svp_gicv3_comms::gicv3_comms_fw_if, svp_gicv3_comms::gicv3_comms_bw_if, 1, sc_core::SC_ONE_OR_MORE_BOUND > |
template<typename T > | |
using | SignalInitiator = amba_pv::signal_master_port< T > |
Private Member Functions | |
SC_HAS_PROCESS (ScxEvsCortexA76) | |
Private Attributes | |
ClockRateControlInitiatorSocket | clockRateControl |
ClockRateControlInitiatorSocket | periphClockRateControl |
AmbaInitiator | amba |
std::vector< std::unique_ptr< TlmGicTarget > > | redist |
std::vector< std::unique_ptr< SignalReceiver > > | cnthpirq |
std::vector< std::unique_ptr< SignalReceiver > > | cnthvirq |
std::vector< std::unique_ptr< SignalReceiver > > | cntpsirq |
std::vector< std::unique_ptr< SignalReceiver > > | cntvirq |
std::vector< std::unique_ptr< SignalReceiver > > | commirq |
std::vector< std::unique_ptr< SignalReceiver > > | ctidbgirq |
std::vector< std::unique_ptr< SignalReceiver > > | pmuirq |
std::vector< std::unique_ptr< SignalReceiver > > | vcpumntirq |
std::vector< std::unique_ptr< SignalReceiver > > | cntpnsirq |
std::vector< std::unique_ptr< SignalInitiator< uint64_t > > > | rvbaraddr |
CortexA76Cluster * | gem5CpuCluster |
const Params & | params |
Static Private Attributes | |
static const int | CoreCount = Types::CoreCount |
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inline |
gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76 | ( | const sc_core::sc_module_name & | mod_name, |
const Params & | p | ||
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Definition at line 74 of file evs.cc.
References tlm::tlm_base_initiator_socket< BUSWIDTH, FW_IF, BW_IF, N, POL >::bind(), gem5::fastmodel::ScxEvsCortexA76< Types >::clockRateControl, gem5::fastmodel::ScxEvsCortexA76< Types >::cnthpirq, gem5::fastmodel::ScxEvsCortexA76< Types >::cnthvirq, gem5::fastmodel::ScxEvsCortexA76< Types >::cntpnsirq, gem5::fastmodel::ScxEvsCortexA76< Types >::cntpsirq, gem5::fastmodel::ScxEvsCortexA76< Types >::cntvirq, gem5::fastmodel::ScxEvsCortexA76< Types >::commirq, gem5::fastmodel::ScxEvsCortexA76< Types >::CoreCount, gem5::csprintf(), gem5::fastmodel::ScxEvsCortexA76< Types >::ctidbgirq, gem5::ArmISA::i, name(), gem5::fastmodel::ScxEvsCortexA76< Types >::periphClockRateControl, gem5::fastmodel::ScxEvsCortexA76< Types >::pmuirq, gem5::fastmodel::ScxEvsCortexA76< Types >::redist, gem5::fastmodel::ScxEvsCortexA76< Types >::rvbaraddr, and gem5::fastmodel::ScxEvsCortexA76< Types >::vcpumntirq.
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override |
Definition at line 125 of file evs.cc.
References gem5::ArmISA::i, gem5::fastmodel::SignalReceiver::onChange(), and gem5::ArmISA::status.
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inlineoverride |
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override |
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private |
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overridevirtual |
Implements gem5::Iris::BaseCpuEvs.
Definition at line 115 of file evs.cc.
References sc_gem5::packet2payload(), and panic_if.
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overridevirtual |
Implements gem5::Iris::BaseCpuEvs.
Definition at line 46 of file evs.cc.
References gem5::sim_clock::as_int::s.
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overridevirtual |
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overridevirtual |
Implements gem5::Iris::BaseCpuEvs.
Definition at line 68 of file evs.cc.
References gem5::X86ISA::addr.
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overridevirtual |
Implements gem5::Iris::BaseCpuEvs.
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inlineoverride |
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private |
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Definition at line 69 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 83 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 84 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 91 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 85 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 86 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 87 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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staticprivate |
Definition at line 63 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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private |
Definition at line 88 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 70 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 89 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 81 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 92 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().
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Definition at line 90 of file evs.hh.
Referenced by gem5::fastmodel::ScxEvsCortexA76< Types >::ScxEvsCortexA76().