gem5 v24.0.0.0
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exec_stage.hh
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1/*
2 * Copyright (c) 2014-2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
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9 * this list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
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30 */
31
32#ifndef __EXEC_STAGE_HH__
33#define __EXEC_STAGE_HH__
34
35#include <string>
36#include <unordered_map>
37#include <utility>
38#include <vector>
39
40#include "base/statistics.hh"
41#include "base/stats/group.hh"
42
43namespace gem5
44{
45
46class ComputeUnit;
47class ScheduleToExecute;
48class Wavefront;
49
50struct ComputeUnitParams;
51
58
60{
61 EMPTY = 0, // no wave present in dispatchList slot
62 EXREADY, // wave ready for execution
63 SKIP, // extra memory resource needed, Shared Mem. only
64};
65
66// Execution stage.
67// Each execution resource executes the
68// wave which is in its dispatch list.
69// The schedule stage is responsible for
70// adding a wave into each execution resource's
71// dispatch list.
72
74{
75 public:
76 ExecStage(const ComputeUnitParams &p, ComputeUnit &cu,
77 ScheduleToExecute &from_schedule);
79 void init();
80 void exec();
81
82 std::string dispStatusToStr(int j);
83 void dumpDispList();
84
85 const std::string& name() const { return _name; }
86
87 private:
88 void collectStatistics(enum STAT_STATUS stage, int unitId);
89 void initStatistics();
92
97 uint64_t idle_dur;
98 const std::string _name;
99
100 protected:
102 {
104
105 // number of transitions from active to idle
107 // number of idle cycles
109 // number of busy cycles
111 // SIMDs active per cycle
113 // duration of idle periods in cycles
115 // number of cycles during which at least one
116 // instruction was issued to an execution resource type
118 // number of idle cycles during which the scheduler
119 // issued no instructions targeting a specific
120 // execution resource type
123};
124
125} // namespace gem5
126
127#endif // __EXEC_STAGE_HH__
void initStatistics()
const std::string & name() const
Definition exec_stage.hh:85
uint64_t idle_dur
Definition exec_stage.hh:97
bool thisTimeInstExecuted
Definition exec_stage.hh:94
ScheduleToExecute & fromSchedule
Definition exec_stage.hh:91
ComputeUnit & computeUnit
Definition exec_stage.hh:90
int executionResourcesUsed
Definition exec_stage.hh:96
bool lastTimeInstExecuted
Definition exec_stage.hh:93
void collectStatistics(enum STAT_STATUS stage, int unitId)
Definition exec_stage.cc:65
const std::string _name
Definition exec_stage.hh:98
gem5::ExecStage::ExecStageStats stats
std::string dispStatusToStr(int j)
ExecStage(const ComputeUnitParams &p, ComputeUnit &cu, ScheduleToExecute &from_schedule)
Definition exec_stage.cc:45
Communication interface between Schedule and Execute stages.
Definition comm.hh:99
A simple distribution stat.
Statistics container.
Definition group.hh:93
This is a simple scalar statistic, like a counter.
A vector of scalar stats.
Bitfield< 0 > p
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
STAT_STATUS
Definition exec_stage.hh:53
@ IdleExec
Definition exec_stage.hh:54
@ BusyExec
Definition exec_stage.hh:55
@ PostExec
Definition exec_stage.hh:56
DISPATCH_STATUS
Definition exec_stage.hh:60
@ EXREADY
Definition exec_stage.hh:62
@ EMPTY
Definition exec_stage.hh:61
Declaration of Statistics objects.
statistics::Distribution idleDur
statistics::Scalar numCyclesWithInstrIssued
statistics::Distribution spc
statistics::Scalar numCyclesWithNoIssue
statistics::Scalar numTransActiveIdle
statistics::Vector numCyclesWithNoInstrTypeIssued
statistics::Vector numCyclesWithInstrTypeIssued
ExecStageStats(statistics::Group *parent)

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