free_list.hh

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 * to a hardware implementation of the functionality of the software
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 * terms below provided that you ensure that this notice is replicated
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 * modified or unmodified, in source code or in binary form.
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 * Copyright (c) 2004-2005 The Regents of The University of Michigan
 * Copyright (c) 2013 Advanced Micro Devices, Inc.
 * All rights reserved.
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#ifndef __CPU_O3_FREE_LIST_HH__
#define __CPU_O3_FREE_LIST_HH__
 
#include <algorithm>
#include <array>
#include <iostream>
#include <queue>
 
#include "base/logging.hh"
#include "base/trace.hh"
#include "cpu/o3/comm.hh"
#include "cpu/o3/regfile.hh"
#include "debug/FreeList.hh"
 
namespace gem5
{
 
namespace o3
{
 
class UnifiedRenameMap;
 
class SimpleFreeList
{
  private:
 
    std::queue<PhysRegIdPtr> freeRegs;
 
  public:
 
    SimpleFreeList() {};
 
    void addReg(PhysRegIdPtr reg) { freeRegs.push(reg); }
 
    template<class InputIt>
    void
    addRegs(InputIt first, InputIt last) {
        std::for_each(first, last, [this](typename InputIt::value_type& reg) {
            freeRegs.push(&reg);
        });
    }
 
    PhysRegIdPtr getReg()
    {
        assert(!freeRegs.empty());
        PhysRegIdPtr free_reg = freeRegs.front();
        freeRegs.pop();
        return free_reg;
    }
 
    unsigned numFreeRegs() const { return freeRegs.size(); }
 
    bool hasFreeRegs() const { return !freeRegs.empty(); }
};
 
 
class UnifiedFreeList
{
  private:
 
    const std::string _name;
 
    std::array<SimpleFreeList, CCRegClass + 1> freeLists;
 
    PhysRegFile *regFile;
 
    /*
     * We give UnifiedRenameMap internal access so it can get at the
     * internal per-class free lists and associate those with its
     * per-class rename maps. See UnifiedRenameMap::init().
     */
    friend class UnifiedRenameMap;
 
  public:
    UnifiedFreeList(const std::string &_my_name, PhysRegFile *_regFile);
 
    std::string name() const { return _name; };
 
    PhysRegIdPtr getReg(RegClassType type) { return freeLists[type].getReg(); }
 
    template<class InputIt>
    void
    addRegs(InputIt first, InputIt last)
    {
        std::for_each(first, last, [this](auto &reg) { addReg(&reg); });
    }
 
    void
    addReg(PhysRegIdPtr freed_reg)
    {
        freeLists[freed_reg->classValue()].addReg(freed_reg);
    }
 
    bool
    hasFreeRegs(RegClassType type) const
    {
        return freeLists[type].hasFreeRegs();
    }
 
    unsigned
    numFreeRegs(RegClassType type) const
    {
        return freeLists[type].numFreeRegs();
    }
};
 
} // namespace o3
} // namespace gem5
 
#endif // __CPU_O3_FREE_LIST_HH__