gem5  v22.0.0.1
free_list.hh
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41 
42 #ifndef __CPU_O3_FREE_LIST_HH__
43 #define __CPU_O3_FREE_LIST_HH__
44 
45 #include <algorithm>
46 #include <array>
47 #include <iostream>
48 #include <queue>
49 
50 #include "base/logging.hh"
51 #include "base/trace.hh"
52 #include "cpu/o3/comm.hh"
53 #include "cpu/o3/regfile.hh"
54 #include "debug/FreeList.hh"
55 
56 namespace gem5
57 {
58 
59 namespace o3
60 {
61 
62 class UnifiedRenameMap;
63 
72 {
73  private:
74 
76  std::queue<PhysRegIdPtr> freeRegs;
77 
78  public:
79 
81 
83  void addReg(PhysRegIdPtr reg) { freeRegs.push(reg); }
84 
86  template<class InputIt>
87  void
88  addRegs(InputIt first, InputIt last) {
89  std::for_each(first, last, [this](typename InputIt::value_type& reg) {
90  freeRegs.push(&reg);
91  });
92  }
93 
96  {
97  assert(!freeRegs.empty());
98  PhysRegIdPtr free_reg = freeRegs.front();
99  freeRegs.pop();
100  return free_reg;
101  }
102 
104  unsigned numFreeRegs() const { return freeRegs.size(); }
105 
107  bool hasFreeRegs() const { return !freeRegs.empty(); }
108 };
109 
110 
125 {
126  private:
127 
130  const std::string _name;
131 
132  std::array<SimpleFreeList, CCRegClass + 1> freeLists;
133 
139 
140  /*
141  * We give UnifiedRenameMap internal access so it can get at the
142  * internal per-class free lists and associate those with its
143  * per-class rename maps. See UnifiedRenameMap::init().
144  */
145  friend class UnifiedRenameMap;
146 
147  public:
156  UnifiedFreeList(const std::string &_my_name, PhysRegFile *_regFile);
157 
159  std::string name() const { return _name; };
160 
163 
165  template<class InputIt>
166  void
167  addRegs(InputIt first, InputIt last)
168  {
169  std::for_each(first, last, [this](auto &reg) { addReg(&reg); });
170  }
171 
173  void
174  addReg(PhysRegIdPtr freed_reg)
175  {
176  freeLists[freed_reg->classValue()].addReg(freed_reg);
177  }
178 
180  bool
182  {
183  return freeLists[type].hasFreeRegs();
184  }
185 
187  unsigned
189  {
190  return freeLists[type].numFreeRegs();
191  }
192 };
193 
194 } // namespace o3
195 } // namespace gem5
196 
197 #endif // __CPU_O3_FREE_LIST_HH__
gem5::o3::SimpleFreeList::freeRegs
std::queue< PhysRegIdPtr > freeRegs
The actual free list.
Definition: free_list.hh:76
gem5::o3::UnifiedFreeList::name
std::string name() const
Gives the name of the freelist.
Definition: free_list.hh:159
gem5::o3::SimpleFreeList
Free list for a single class of registers (e.g., integer or floating point).
Definition: free_list.hh:71
gem5::o3::UnifiedFreeList::UnifiedFreeList
UnifiedFreeList(const std::string &_my_name, PhysRegFile *_regFile)
Constructs a free list.
Definition: free_list.cc:41
gem5::o3::UnifiedFreeList
FreeList class that simply holds the list of free integer and floating point registers.
Definition: free_list.hh:124
regfile.hh
gem5::o3::SimpleFreeList::numFreeRegs
unsigned numFreeRegs() const
Return the number of free registers on the list.
Definition: free_list.hh:104
gem5::o3::SimpleFreeList::SimpleFreeList
SimpleFreeList()
Definition: free_list.hh:80
gem5::o3::UnifiedFreeList::hasFreeRegs
bool hasFreeRegs(RegClassType type) const
Checks if there are any free registers of type type.
Definition: free_list.hh:181
comm.hh
gem5::o3::SimpleFreeList::addRegs
void addRegs(InputIt first, InputIt last)
Add physical registers to the free list.
Definition: free_list.hh:88
gem5::o3::UnifiedFreeList::regFile
PhysRegFile * regFile
The register file object is used only to distinguish integer from floating-point physical register in...
Definition: free_list.hh:138
gem5::o3::UnifiedFreeList::getReg
PhysRegIdPtr getReg(RegClassType type)
Gets a free register of type type.
Definition: free_list.hh:162
gem5::o3::PhysRegFile
Simple physical register file class.
Definition: regfile.hh:67
gem5::X86ISA::type
type
Definition: misc.hh:727
gem5::o3::UnifiedFreeList::addRegs
void addRegs(InputIt first, InputIt last)
Adds a register back to the free list.
Definition: free_list.hh:167
gem5::o3::SimpleFreeList::addReg
void addReg(PhysRegIdPtr reg)
Add a physical register to the free list.
Definition: free_list.hh:83
gem5::X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:92
gem5::o3::SimpleFreeList::getReg
PhysRegIdPtr getReg()
Get the next available register from the free list.
Definition: free_list.hh:95
gem5::o3::UnifiedFreeList::numFreeRegs
unsigned numFreeRegs(RegClassType type) const
Returns the number of free registers of type type.
Definition: free_list.hh:188
gem5::RegClassType
RegClassType
Enumerate the classes of registers.
Definition: reg_class.hh:56
gem5::o3::SimpleFreeList::hasFreeRegs
bool hasFreeRegs() const
True iff there are free registers on the list.
Definition: free_list.hh:107
gem5::o3::UnifiedFreeList::freeLists
std::array< SimpleFreeList, CCRegClass+1 > freeLists
Definition: free_list.hh:132
gem5::o3::UnifiedFreeList::_name
const std::string _name
The object name, for DPRINTF.
Definition: free_list.hh:130
logging.hh
gem5::PhysRegId
Physical register ID.
Definition: reg_class.hh:245
trace.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::PhysRegId::classValue
constexpr RegClassType classValue() const
Class accessor.
Definition: reg_class.hh:191
gem5::o3::UnifiedFreeList::addReg
void addReg(PhysRegIdPtr freed_reg)
Adds a register back to the free list.
Definition: free_list.hh:174
gem5::o3::UnifiedRenameMap
Unified register rename map for all classes of registers.
Definition: rename_map.hh:168

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