gem5  v21.1.0.2
gic_v2m.cc
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37 
57 #include "dev/arm/gic_v2m.hh"
58 
59 #include "base/bitunion.hh"
60 #include "base/intmath.hh"
61 #include "debug/Checkpoint.hh"
62 #include "debug/GICV2M.hh"
63 #include "dev/io_device.hh"
64 #include "mem/packet.hh"
65 #include "mem/packet_access.hh"
66 
67 namespace gem5
68 {
69 
71  : PioDevice(p), pioDelay(p.pio_delay), frames(p.frames), gic(p.gic)
72 {
73  // Assert SPI ranges start at 32
74  for (int i = 0; i < frames.size(); i++) {
75  if (frames[i]->spi_base < 32)
76  fatal("Gicv2m: Frame %d's SPI base (%d) is not in SPI space\n",
77  i, frames[i]->spi_base);
78  }
79  unsigned int x = frames.size();
80  fatal_if(!isPowerOf2(x), "Gicv2m: The v2m shim must be configured with "
81  "a power-of-two number of frames\n");
83 }
84 
87 {
88  AddrRangeList ranges;
89  for (int i = 0; i < frames.size(); i++) {
90  ranges.push_back(RangeSize(frames[i]->addr, FRAME_SIZE));
91  }
92  return ranges;
93 }
94 
95 Tick
97 {
98  int frame = frameFromAddr(pkt->getAddr());
99 
100  assert(frame >= 0);
101 
102  Addr offset = pkt->getAddr() - frames[frame]->addr;
103 
104  switch (offset) {
105  case MSI_TYPER:
106  pkt->setLE<uint32_t>((frames[frame]->spi_base << 16) |
107  frames[frame]->spi_len);
108  break;
109 
110  case PER_ID4:
111  pkt->setLE<uint32_t>(0x4 | ((4+log2framenum) << 4));
112  // Nr of 4KB blocks used by component. This is messy as frames are 64K
113  // (16, ie 2^4) and we should assert we're given a Po2 number of frames.
114  break;
115  default:
116  DPRINTF(GICV2M, "GICv2m: Read of unk reg %#x\n", offset);
117  pkt->setLE<uint32_t>(0);
118  };
119 
120  pkt->makeAtomicResponse();
121 
122  return pioDelay;
123 }
124 
125 Tick
127 {
128  int frame = frameFromAddr(pkt->getAddr());
129 
130  assert(frame >= 0);
131 
132  Addr offset = pkt->getAddr() - frames[frame]->addr;
133 
134  if (offset == MSI_SETSPI_NSR) {
135  /* Is payload SPI number within range? */
136  uint32_t m = pkt->getLE<uint32_t>();
137  if (m >= frames[frame]->spi_base &&
138  m < (frames[frame]->spi_base + frames[frame]->spi_len)) {
139  DPRINTF(GICV2M, "GICv2m: Frame %d raising MSI %d\n", frame, m);
140  gic->sendInt(m);
141  }
142  } else {
143  DPRINTF(GICV2M, "GICv2m: Write of unk reg %#x\n", offset);
144  }
145 
146  pkt->makeAtomicResponse();
147 
148  return pioDelay;
149 }
150 
151 int
153 {
154  for (int i = 0; i < frames.size(); i++) {
155  if (a >= frames[i]->addr && a < (frames[i]->addr + FRAME_SIZE))
156  return i;
157  }
158  return -1;
159 }
160 
161 } // namespace gem5
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:189
gem5::Gicv2m::MSI_SETSPI_NSR
static const int MSI_SETSPI_NSR
Definition: gic_v2m.hh:81
io_device.hh
gem5::Gicv2m::getAddrRanges
virtual AddrRangeList getAddrRanges() const
Return the address ranges used by the Gicv2m This is the set of frame addresses.
Definition: gic_v2m.cc:86
gem5::PioDevice
This device is the base class which all devices senstive to an address range inherit from.
Definition: io_device.hh:102
gem5::Gicv2m::log2framenum
unsigned int log2framenum
Count of number of configured frames, as log2(frames)
Definition: gic_v2m.hh:94
gem5::RangeSize
AddrRange RangeSize(Addr start, Addr size)
Definition: addr_range.hh:661
gem5::Gicv2m::PER_ID4
static const int PER_ID4
Definition: gic_v2m.hh:82
gem5::Gicv2m::read
virtual Tick read(PacketPtr pkt)
A PIO read to the device.
Definition: gic_v2m.cc:96
gem5::ArmISA::a
Bitfield< 8 > a
Definition: misc_types.hh:65
gem5::Gicv2m::Gicv2m
Gicv2m(const Params &p)
Definition: gic_v2m.cc:70
gem5::Packet::makeAtomicResponse
void makeAtomicResponse()
Definition: packet.hh:1043
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::isPowerOf2
static constexpr bool isPowerOf2(const T &n)
Definition: intmath.hh:98
packet.hh
gem5::ArmISA::gic
Bitfield< 27, 24 > gic
Definition: misc_types.hh:174
gem5::Gicv2m::MSI_TYPER
static const int MSI_TYPER
Definition: gic_v2m.hh:80
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
bitunion.hh
gem5::ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:144
gem5::BaseGic::sendInt
virtual void sendInt(uint32_t num)=0
Post an interrupt from a device that is connected to the GIC.
gem5::Gicv2m::FRAME_SIZE
static const int FRAME_SIZE
Definition: gic_v2m.hh:78
gem5::Gicv2m::frameFromAddr
int frameFromAddr(Addr a) const
Determine which frame a PIO access lands in.
Definition: gic_v2m.cc:152
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
packet_access.hh
gem5::Gicv2m::frames
std::vector< Gicv2mFrame * > frames
A set of configured hardware frames.
Definition: gic_v2m.hh:88
gem5::ArmISA::m
Bitfield< 0 > m
Definition: misc_types.hh:394
gem5::RiscvISA::x
Bitfield< 3 > x
Definition: pagetable.hh:73
gem5::Gicv2m::pioDelay
const Tick pioDelay
Latency for an MMIO operation.
Definition: gic_v2m.hh:85
gem5::floorLog2
static constexpr std::enable_if_t< std::is_integral< T >::value, int > floorLog2(T x)
Definition: intmath.hh:59
gem5::Gicv2m::gic
BaseGic * gic
Gic to which we fire interrupts.
Definition: gic_v2m.hh:91
gem5::Packet::getLE
T getLE() const
Get the data in the packet byte swapped from little endian to host endian.
Definition: packet_access.hh:78
gem5::Packet::setLE
void setLE(T v)
Set the value in the data pointer to v as little endian.
Definition: packet_access.hh:108
std::list< AddrRange >
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:781
intmath.hh
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:225
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gic_v2m.hh
gem5::Gicv2m::write
virtual Tick write(PacketPtr pkt)
A PIO read to the device.
Definition: gic_v2m.cc:126
gem5::Gicv2m::Params
Gicv2mParams Params
Definition: gic_v2m.hh:97
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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