gem5  v21.1.0.2
hybrid_gen.hh
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37 
44 #ifndef __CPU_TRAFFIC_GEN_HYBRID_GEN_HH__
45 #define __CPU_TRAFFIC_GEN_HYBRID_GEN_HH__
46 
47 #include "base/bitfield.hh"
48 #include "base/intmath.hh"
49 #include "base_gen.hh"
50 #include "enums/AddrMap.hh"
51 #include "mem/packet.hh"
52 
53 namespace gem5
54 {
55 
61 class HybridGen : public BaseGen
62 {
63 
64  public:
65 
99  HybridGen(SimObject &obj,
100  RequestorID requestor_id, Tick _duration,
101  Addr start_addr_dram, Addr end_addr_dram,
102  Addr blocksize_dram,
103  Addr start_addr_nvm, Addr end_addr_nvm,
104  Addr blocksize_nvm,
105  Addr cacheline_size,
106  Tick min_period, Tick max_period,
107  uint8_t read_percent, Addr data_limit,
108  unsigned int num_seq_pkts_dram, unsigned int page_size_dram,
109  unsigned int nbr_of_banks_dram, unsigned int nbr_of_banks_util_dram,
110  unsigned int num_seq_pkts_nvm, unsigned int buffer_size_nvm,
111  unsigned int nbr_of_banks_nvm, unsigned int nbr_of_banks_util_nvm,
112  enums::AddrMap addr_mapping,
113  unsigned int nbr_of_ranks_dram,
114  unsigned int nbr_of_ranks_nvm,
115  uint8_t nvm_percent);
116 
117  void enter();
118 
120 
127  void genStartAddr(unsigned int new_bank , unsigned int new_rank);
128 
129  Tick nextPacketTick(bool elastic, Tick delay) const;
130 
131  protected:
134 
137 
140 
143 
146 
149 
152 
156 
158  const uint8_t readPercent;
159 
162 
164  const unsigned int numSeqPktsDram;
165  const unsigned int numSeqPktsNvm;
166 
168  unsigned int countNumSeqPkts;
169 
172 
174  const unsigned int pageSizeDram;
175 
177  const unsigned int pageBitsDram;
178 
180  const unsigned int bankBitsDram;
181 
183  const unsigned int blockBitsDram;
184 
186  const unsigned int nbrOfBanksDram;
187 
189  const unsigned int nbrOfBanksUtilDram;
190 
192  const unsigned int bufferSizeNvm;
193 
195  const unsigned int pageBitsNvm;
196 
198  const unsigned int bankBitsNvm;
199 
201  const unsigned int blockBitsNvm;
202 
204  const unsigned int nbrOfBanksNvm;
205 
207  const unsigned int nbrOfBanksUtilNvm;
208 
210  enums::AddrMap addrMapping;
211 
213  const unsigned int nbrOfRanksDram;
214 
216  const unsigned int rankBitsDram;
217 
219  const unsigned int nbrOfRanksNvm;
220 
222  const unsigned int rankBitsNvm;
223 
225  const uint8_t nvmPercent;
226 
228  bool isRead;
229 
231  bool isNvm;
232 
239 
241  unsigned int numSeqPkts;
242 
245 
248 
251 
253  unsigned int pageSize;
254 
256  unsigned int pageBits;
257 
259  unsigned int bankBits;
260 
262  unsigned int blockBits;
263 
265  unsigned int nbrOfBanks;
266 
268  unsigned int nbrOfBanksUtil;
269 
271  unsigned int nbrOfRanks;
272 
274  unsigned int rankBits;
275 
276 };
277 
278 } // namespace gem5
279 
280 #endif
gem5::HybridGen::countNumSeqPkts
unsigned int countNumSeqPkts
Track number of sequential packets generated for a request
Definition: hybrid_gen.hh:168
gem5::HybridGen::rankBits
unsigned int rankBits
Number of rank bits in DRAM address.
Definition: hybrid_gen.hh:274
gem5::HybridGen
Hybrid NVM + DRAM specific generator is for issuing request with variable buffer hit length and bank ...
Definition: hybrid_gen.hh:61
gem5::HybridGen::cacheLineSize
const Addr cacheLineSize
Cache line size in the simulated system.
Definition: hybrid_gen.hh:151
gem5::HybridGen::addrMapping
enums::AddrMap addrMapping
Address mapping to be used.
Definition: hybrid_gen.hh:210
gem5::HybridGen::blocksizeNvm
const Addr blocksizeNvm
Blocksize and address increment for DRAM.
Definition: hybrid_gen.hh:148
gem5::HybridGen::pageBitsNvm
const unsigned int pageBitsNvm
Number of buffer bits in NVM address.
Definition: hybrid_gen.hh:195
gem5::HybridGen::nvmPercent
const uint8_t nvmPercent
Percent of generated transactions that should go to NVM.
Definition: hybrid_gen.hh:225
gem5::HybridGen::numSeqPkts
unsigned int numSeqPkts
Number of sequential DRAM packets to be generated per cpu request.
Definition: hybrid_gen.hh:241
gem5::HybridGen::blocksize
Addr blocksize
Blocksize and address increment.
Definition: hybrid_gen.hh:250
gem5::HybridGen::isRead
bool isRead
Remember type of requests to be generated in series.
Definition: hybrid_gen.hh:228
gem5::HybridGen::pageSizeDram
const unsigned int pageSizeDram
Page size of DRAM.
Definition: hybrid_gen.hh:174
gem5::HybridGen::bankBitsNvm
const unsigned int bankBitsNvm
Number of bank bits in NVM address.
Definition: hybrid_gen.hh:198
gem5::HybridGen::maxPeriod
const Tick maxPeriod
Definition: hybrid_gen.hh:155
gem5::HybridGen::HybridGen
HybridGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr_dram, Addr end_addr_dram, Addr blocksize_dram, Addr start_addr_nvm, Addr end_addr_nvm, Addr blocksize_nvm, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit, unsigned int num_seq_pkts_dram, unsigned int page_size_dram, unsigned int nbr_of_banks_dram, unsigned int nbr_of_banks_util_dram, unsigned int num_seq_pkts_nvm, unsigned int buffer_size_nvm, unsigned int nbr_of_banks_nvm, unsigned int nbr_of_banks_util_nvm, enums::AddrMap addr_mapping, unsigned int nbr_of_ranks_dram, unsigned int nbr_of_ranks_nvm, uint8_t nvm_percent)
Create a hybrid DRAM + NVM address sequence generator.
Definition: hybrid_gen.cc:50
gem5::HybridGen::startAddrNvm
const Addr startAddrNvm
Start of DRAM address range.
Definition: hybrid_gen.hh:142
gem5::HybridGen::pageSize
unsigned int pageSize
Page size of DRAM.
Definition: hybrid_gen.hh:253
gem5::HybridGen::endAddr
Addr endAddr
End of address range.
Definition: hybrid_gen.hh:247
gem5::HybridGen::startAddrDram
const Addr startAddrDram
Start of DRAM address range.
Definition: hybrid_gen.hh:133
gem5::HybridGen::nbrOfBanksUtilDram
const unsigned int nbrOfBanksUtilDram
Number of banks to be utilized for a given configuration.
Definition: hybrid_gen.hh:189
packet.hh
gem5::HybridGen::bankBits
unsigned int bankBits
Number of bank bits in DRAM address.
Definition: hybrid_gen.hh:259
gem5::HybridGen::rankBitsNvm
const unsigned int rankBitsNvm
Number of rank bits in DRAM address.
Definition: hybrid_gen.hh:222
gem5::HybridGen::dataManipulated
Addr dataManipulated
Counter to determine the amount of data manipulated.
Definition: hybrid_gen.hh:238
gem5::HybridGen::pageBitsDram
const unsigned int pageBitsDram
Number of page bits in DRAM address.
Definition: hybrid_gen.hh:177
gem5::HybridGen::dataLimit
const Addr dataLimit
Maximum amount of data to manipulate.
Definition: hybrid_gen.hh:161
gem5::HybridGen::nbrOfBanksNvm
const unsigned int nbrOfBanksNvm
Number of banks in NVM.
Definition: hybrid_gen.hh:204
bitfield.hh
gem5::HybridGen::blockBitsDram
const unsigned int blockBitsDram
Number of block bits in DRAM address.
Definition: hybrid_gen.hh:183
gem5::HybridGen::nbrOfRanksDram
const unsigned int nbrOfRanksDram
Number of ranks to be utilized for a given configuration.
Definition: hybrid_gen.hh:213
gem5::HybridGen::blockBitsNvm
const unsigned int blockBitsNvm
Number of block bits in NVM address.
Definition: hybrid_gen.hh:201
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::HybridGen::bankBitsDram
const unsigned int bankBitsDram
Number of bank bits in DRAM address.
Definition: hybrid_gen.hh:180
gem5::HybridGen::nbrOfBanksDram
const unsigned int nbrOfBanksDram
Number of banks in DRAM.
Definition: hybrid_gen.hh:186
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::HybridGen::nextPacketTick
Tick nextPacketTick(bool elastic, Tick delay) const
Determine the tick when the next packet is available.
Definition: hybrid_gen.cc:287
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::HybridGen::blocksizeDram
const Addr blocksizeDram
Blocksize and address increment for DRAM.
Definition: hybrid_gen.hh:139
gem5::HybridGen::minPeriod
const Tick minPeriod
Request generation period.
Definition: hybrid_gen.hh:154
gem5::HybridGen::nbrOfBanksUtilNvm
const unsigned int nbrOfBanksUtilNvm
Number of banks to be utilized for a given configuration.
Definition: hybrid_gen.hh:207
gem5::BaseGen
Base class for all generators, with the shared functionality and virtual functions for entering,...
Definition: base_gen.hh:64
gem5::HybridGen::genStartAddr
void genStartAddr(unsigned int new_bank, unsigned int new_rank)
Insert bank, rank, and column bits into packed address to create address for 1st command in a series.
Definition: hybrid_gen.cc:238
gem5::HybridGen::getNextPacket
PacketPtr getNextPacket()
Get the next generated packet.
Definition: hybrid_gen.cc:139
gem5::HybridGen::nbrOfBanks
unsigned int nbrOfBanks
Number of banks in DRAM.
Definition: hybrid_gen.hh:265
gem5::HybridGen::numSeqPktsDram
const unsigned int numSeqPktsDram
Number of sequential packets to be generated per cpu request.
Definition: hybrid_gen.hh:164
gem5::HybridGen::addr
Addr addr
Address of request.
Definition: hybrid_gen.hh:171
gem5::HybridGen::enter
void enter()
Enter this generator state.
Definition: hybrid_gen.cc:132
gem5::HybridGen::nbrOfBanksUtil
unsigned int nbrOfBanksUtil
Number of banks to be utilized for a given configuration.
Definition: hybrid_gen.hh:268
gem5::HybridGen::blockBits
unsigned int blockBits
Number of block bits in DRAM address.
Definition: hybrid_gen.hh:262
gem5::HybridGen::startAddr
Addr startAddr
Start of address range.
Definition: hybrid_gen.hh:244
gem5::HybridGen::numSeqPktsNvm
const unsigned int numSeqPktsNvm
Definition: hybrid_gen.hh:165
gem5::HybridGen::readPercent
const uint8_t readPercent
Percent of generated transactions that should be reads.
Definition: hybrid_gen.hh:158
gem5::HybridGen::nbrOfRanks
unsigned int nbrOfRanks
Number of ranks to be utilized for a given configuration.
Definition: hybrid_gen.hh:271
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
gem5::HybridGen::pageBits
unsigned int pageBits
Number of page bits in DRAM address.
Definition: hybrid_gen.hh:256
gem5::HybridGen::nbrOfRanksNvm
const unsigned int nbrOfRanksNvm
Number of ranks to be utilized for a given configuration.
Definition: hybrid_gen.hh:219
gem5::HybridGen::isNvm
bool isNvm
Remember the interface to be generated in series.
Definition: hybrid_gen.hh:231
intmath.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
base_gen.hh
gem5::HybridGen::rankBitsDram
const unsigned int rankBitsDram
Number of rank bits in DRAM address.
Definition: hybrid_gen.hh:216
gem5::HybridGen::endAddrDram
const Addr endAddrDram
End of DRAM address range.
Definition: hybrid_gen.hh:136
gem5::HybridGen::endAddrNvm
const Addr endAddrNvm
End of DRAM address range.
Definition: hybrid_gen.hh:145
gem5::HybridGen::bufferSizeNvm
const unsigned int bufferSizeNvm
Buffer size of NVM.
Definition: hybrid_gen.hh:192

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