gem5  v22.1.0.0
pci.hh
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37 
38 #ifndef __DEV_VIRTIO_PCI_HH__
39 #define __DEV_VIRTIO_PCI_HH__
40 
41 #include "base/statistics.hh"
42 #include "dev/virtio/base.hh"
43 #include "dev/pci/device.hh"
44 
45 namespace gem5
46 {
47 
48 struct PciVirtIOParams;
49 
50 class PciVirtIO : public PciDevice
51 {
52  public:
53  typedef PciVirtIOParams Params;
54  PciVirtIO(const Params &params);
55  virtual ~PciVirtIO();
56 
57  Tick read(PacketPtr pkt);
58  Tick write(PacketPtr pkt);
59 
60  void kick();
61 
62  protected:
66  static const Addr OFF_DEVICE_FEATURES = 0x00;
67  static const Addr OFF_GUEST_FEATURES = 0x04;
68  static const Addr OFF_QUEUE_ADDRESS = 0x08;
69  static const Addr OFF_QUEUE_SIZE = 0x0C;
70  static const Addr OFF_QUEUE_SELECT = 0x0E;
71  static const Addr OFF_QUEUE_NOTIFY = 0x10;
72  static const Addr OFF_DEVICE_STATUS = 0x12;
73  static const Addr OFF_ISR_STATUS = 0x13;
74  static const Addr OFF_VIO_DEVICE = 0x14;
75 
79 
80 
82 
84 
86 };
87 
88 } // namespace gem5
89 
90 #endif // __DEV_VIRTIO_PCI_HH__
DmaDeviceParams Params
Definition: dma_device.hh:209
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
PCI device, base implementation is only config space.
Definition: device.hh:270
virtual ~PciVirtIO()
Definition: pci.cc:65
static const Addr OFF_GUEST_FEATURES
Definition: pci.hh:67
Tick read(PacketPtr pkt)
Pure virtual function that the device must implement.
Definition: pci.cc:70
Tick write(PacketPtr pkt)
Pure virtual function that the device must implement.
Definition: pci.cc:151
static const Addr OFF_DEVICE_FEATURES
Offsets into VirtIO header (BAR0 relative).
Definition: pci.hh:66
static const Addr OFF_QUEUE_SELECT
Definition: pci.hh:70
static const Addr OFF_QUEUE_NOTIFY
Definition: pci.hh:71
VirtIODeviceBase & vio
Definition: pci.hh:85
static const Addr OFF_QUEUE_ADDRESS
Definition: pci.hh:68
PciVirtIO(const Params &params)
Definition: pci.cc:49
PciVirtIOParams Params
Definition: pci.hh:53
static const Addr OFF_VIO_DEVICE
Definition: pci.hh:74
static const Addr BAR0_SIZE_BASE
Definition: pci.hh:78
bool interruptDeliveryPending
Definition: pci.hh:83
static const Addr OFF_QUEUE_SIZE
Definition: pci.hh:69
static const Addr OFF_DEVICE_STATUS
Definition: pci.hh:72
static const Addr OFF_ISR_STATUS
Definition: pci.hh:73
void kick()
Definition: pci.cc:223
VirtIODeviceBase::QueueID queueNotify
Definition: pci.hh:81
Base class for all VirtIO-based devices.
Definition: base.hh:588
uint16_t QueueID
Definition: base.hh:590
const Params & params() const
Definition: sim_object.hh:176
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint64_t Tick
Tick count type.
Definition: types.hh:58
Declaration of Statistics objects.

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