gem5  v22.1.0.0
fs_workload.cc
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28 
30 
31 #include "arch/riscv/faults.hh"
32 #include "base/loader/dtb_file.hh"
34 #include "base/loader/symtab.hh"
35 #include "sim/kernel_workload.hh"
36 #include "sim/system.hh"
37 
38 namespace gem5
39 {
40 
41 namespace RiscvISA
42 {
43 
44 void
46 {
48 
49  if (params().dtb_filename != "") {
50  inform("Loading DTB file: %s at address %#x\n", params().dtb_filename,
51  params().dtb_addr);
52 
53  auto *dtb_file = new loader::DtbFile(params().dtb_filename);
54 
55  if (!dtb_file->addBootCmdLine(
56  commandLine.c_str(), commandLine.size())) {
57  warn("couldn't append bootargs to DTB file: %s\n",
58  params().dtb_filename);
59  }
60 
61  dtb_file->buildImage().offset(params().dtb_addr)
62  .write(system->physProxy);
63  delete dtb_file;
64 
65  for (auto *tc: system->threads) {
66  tc->setReg(int_reg::A1, params().dtb_addr);
67  }
68  } else {
69  warn("No DTB file specified\n");
70  }
71 
72  for (auto *tc: system->threads) {
73  RiscvISA::Reset().invoke(tc);
74  tc->activate();
75  }
76 }
77 
78 } // namespace RiscvISA
79 } // namespace gem5
const std::string commandLine
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: fs_workload.cc:45
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
Definition: system.hh:326
Threads threads
Definition: system.hh:313
System * system
Definition: workload.hh:80
This implements an image file format to support loading and modifying flattened device tree blobs for...
const Params & params() const
Definition: sim_object.hh:176
#define warn(...)
Definition: logging.hh:246
#define inform(...)
Definition: logging.hh:247
constexpr RegId A1
Definition: int.hh:102
@ Reset
Definition: types.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....

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