46 #ifndef __ARCH_RISCV_REGS_INT_HH__
47 #define __ARCH_RISCV_REGS_INT_HH__
53 #include "debug/IntRegs.hh"
90 inline constexpr
RegId
126 "zero",
"ra",
"sp",
"gp",
127 "tp",
"t0",
"t1",
"t2",
128 "s0",
"s1",
"a0",
"a1",
129 "a2",
"a3",
"a4",
"a5",
130 "a6",
"a7",
"s2",
"s3",
131 "s4",
"s5",
"s6",
"s7",
132 "s8",
"s9",
"s10",
"s11",
133 "t3",
"t4",
"t5",
"t6"
139 inline constexpr
auto
Register ID: describe an architectural register with its class and index.
const std::vector< std::string > RegNames
constexpr auto & AMOTempReg
constexpr auto & StackPointerReg
constexpr RegId ArgumentRegs[]
constexpr auto & ThreadPointerReg
constexpr RegClass intRegClass(IntRegClass, IntRegClassName, int_reg::NumRegs, debug::IntRegs)
constexpr auto & ReturnAddrReg
constexpr auto & ReturnValueReg
constexpr auto & SyscallNumReg
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
constexpr char IntRegClassName[]
@ IntRegClass
Integer register.