gem5  v22.1.0.0
vio_mmio.hh
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38 
39 #ifndef __DEV_ARM_VIO_MMIO_HH__
40 #define __DEV_ARM_VIO_MMIO_HH__
41 
42 #include "dev/riscv/hifive.hh"
43 #include "dev/riscv/plic_device.hh"
44 #include "dev/virtio/base.hh"
45 
46 namespace gem5
47 {
48 
49 struct RiscvMmioVirtIOParams;
50 
51 namespace RiscvISA
52 {
53 
54 class MmioVirtIO : public PlicIntDevice
55 {
56  public:
57  MmioVirtIO(const RiscvMmioVirtIOParams &params);
58  virtual ~MmioVirtIO();
59 
60  protected: // BasicPioDevice
61  Tick read(PacketPtr pkt) override;
62  Tick write(PacketPtr pkt) override;
63 
64  protected:
68  enum : Addr
69  {
70  OFF_MAGIC = 0x00,
71  OFF_VERSION = 0x04,
72  OFF_DEVICE_ID = 0x08,
73  OFF_VENDOR_ID = 0x0C,
81  OFF_QUEUE_NUM = 0x38,
83  OFF_QUEUE_PFN = 0x40,
87  OFF_STATUS = 0x70,
88  OFF_CONFIG = 0x100,
89  };
90 
93  enum
94  {
95  INT_USED_RING = 1 << 0,
96  INT_CONFIG = 1 << 1,
97  };
98 
99  static const uint32_t MAGIC = 0x74726976;
100  static const uint32_t VERSION = 1;
101  static const uint32_t VENDOR_ID = 0x1AF4;
102 
103 
104  uint32_t read(Addr offset);
105  void write(Addr offset, uint32_t value);
106 
107  void kick();
108  void setInterrupts(uint32_t value);
109 
112  uint32_t pageSize;
113  uint32_t interruptStatus;
114 
115  protected: // Params
117 };
118 
119 } // namespace RiscvISA
120 
121 } // namespace gem5
122 
123 #endif // __DEV_ARM_VIO_MMIO_HH__
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
const Params & params() const
Definition: plic_device.hh:60
MmioVirtIO(const RiscvMmioVirtIOParams &params)
Definition: vio_mmio.cc:52
static const uint32_t MAGIC
Definition: vio_mmio.hh:99
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: vio_mmio.cc:65
static const uint32_t VERSION
Definition: vio_mmio.hh:100
static const uint32_t VENDOR_ID
Definition: vio_mmio.hh:101
void setInterrupts(uint32_t value)
Definition: vio_mmio.cc:268
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: vio_mmio.cc:162
VirtIODeviceBase & vio
Definition: vio_mmio.hh:116
Base class for all VirtIO-based devices.
Definition: base.hh:588
Bitfield< 23, 0 > offset
Definition: types.hh:144
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint64_t Tick
Tick count type.
Definition: types.hh:58

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