gem5  v21.1.0.2
smmu_v3_transl.hh
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37 
38 #ifndef __DEV_ARM_SMMU_V3_TRANSL_HH__
39 #define __DEV_ARM_SMMU_V3_TRANSL_HH__
40 
41 #include "base/compiler.hh"
43 #include "dev/arm/smmu_v3_proc.hh"
44 #include "dev/arm/smmu_v3_ptops.hh"
45 #include "mem/packet.hh"
46 
47 namespace gem5
48 {
49 
51 {
53  unsigned size;
54  uint32_t sid; // streamId
55  uint32_t ssid; // substreamId
56  bool isWrite;
57  bool isPrefetch;
59 
61 
62  static SMMUTranslRequest fromPacket(PacketPtr pkt, bool ats = false);
63  static SMMUTranslRequest prefetch(Addr addr, uint32_t sid, uint32_t ssid);
64 };
65 
67 {
68  private:
70  {
74  uint16_t asid;
75  uint16_t vmid;
78  uint8_t t0sz;
79  uint8_t s2t0sz;
80  };
81 
82  enum FaultType
83  {
85  FAULT_TRANSLATION, // F_TRANSLATION
86  FAULT_PERMISSION, // F_PERMISSION
87  };
88 
89  struct TranslResult
90  {
94  bool writable;
95  };
96 
98 
101 
104 
105  virtual void main(Yield &yield);
106 
107  TranslResult bypass(Addr addr) const;
109 
110  bool microTLBLookup(Yield &yield, TranslResult &tr);
111  bool ifcTLBLookup(Yield &yield, TranslResult &tr, bool &wasPrefetched);
112  bool smmuTLBLookup(Yield &yield, TranslResult &tr);
113 
114  void microTLBUpdate(Yield &yield, const TranslResult &tr);
115  void ifcTLBUpdate(Yield &yield, const TranslResult &tr);
116  void smmuTLBUpdate(Yield &yield, const TranslResult &tr);
117 
118  bool configCacheLookup(Yield &yield, TranslContext &tc);
119  void configCacheUpdate(Yield &yield, const TranslContext &tc);
120  bool findConfig(Yield &yield, TranslContext &tc, TranslResult &tr);
121 
122  void walkCacheLookup(Yield &yield,
123  const WalkCache::Entry *&walkEntry,
124  Addr addr, uint16_t asid, uint16_t vmid,
125  unsigned stage, unsigned level);
126 
127  void walkCacheUpdate(Yield &yield, Addr va, Addr vaMask, Addr pa,
128  unsigned stage, unsigned level,
129  bool leaf, uint8_t permissions);
130 
132  const PageTableOps *pt_ops,
133  unsigned level, Addr walkPtr);
134 
135  TranslResult walkStage2(Yield &yield, Addr addr, bool final_tr,
136  const PageTableOps *pt_ops,
137  unsigned level, Addr walkPtr);
138 
140  TranslResult translateStage2(Yield &yield, Addr addr, bool final_tr);
141 
143  const TranslResult &s2tr) const;
144 
150  bool hazard4kCheck();
151  void hazard4kRegister();
152  void hazard4kHold(Yield &yield);
153  void hazard4kRelease();
154 
159  void hazardIdRegister();
160  void hazardIdHold(Yield &yield);
161  void hazardIdRelease();
162 
163  void issuePrefetch(Addr addr);
164 
165  void completeTransaction(Yield &yield, const TranslResult &tr);
166  void completePrefetch(Yield &yield);
167 
168  void sendEvent(Yield &yield, const SMMUEvent &ev);
169 
170  void doReadSTE(Yield &yield, StreamTableEntry &ste, uint32_t sid);
171  void doReadCD(Yield &yield, ContextDescriptor &cd,
172  const StreamTableEntry &ste, uint32_t sid, uint32_t ssid);
173  void doReadConfig(Yield &yield, Addr addr, void *ptr, size_t size,
174  uint32_t sid, uint32_t ssid);
175  void doReadPTE(Yield &yield, Addr va, Addr addr, void *ptr,
176  unsigned stage, unsigned level);
177 
178  public:
179  SMMUTranslationProcess(const std::string &name, SMMUv3 &_smmu,
180  SMMUv3DeviceInterface &_ifc);
181 
182  virtual ~SMMUTranslationProcess();
183 
184  void beginTransaction(const SMMUTranslRequest &req);
185  void resumeTransaction();
186 };
187 
188 } // namespace gem5
189 
190 #endif /* __DEV_ARM_SMMU_V3_TRANSL_HH__ */
gem5::X86ISA::level
Bitfield< 20 > level
Definition: intmessage.hh:51
gem5::SMMUTranslationProcess::FAULT_TRANSLATION
@ FAULT_TRANSLATION
Definition: smmu_v3_transl.hh:85
gem5::SMMUTranslationProcess::microTLBUpdate
void microTLBUpdate(Yield &yield, const TranslResult &tr)
Definition: smmu_v3_transl.cc:411
gem5::SMMUTranslRequest::sid
uint32_t sid
Definition: smmu_v3_transl.hh:54
gem5::SMMUTranslationProcess::hazardIdRegister
void hazardIdRegister()
Used to force ordering on transactions with the same orderId.
Definition: smmu_v3_transl.cc:1130
gem5::SMMUTranslRequest::ssid
uint32_t ssid
Definition: smmu_v3_transl.hh:55
gem5::StreamTableEntry
Definition: smmu_v3_defs.hh:194
gem5::SMMUTranslationProcess::issuePrefetch
void issuePrefetch(Addr addr)
Definition: smmu_v3_transl.cc:1209
gem5::SMMUTranslationProcess::hazardIdRelease
void hazardIdRelease()
Definition: smmu_v3_transl.cc:1184
gem5::SMMUTranslationProcess::TranslContext::ttb1
Addr ttb1
Definition: smmu_v3_transl.hh:73
gem5::SMMUProcess
Definition: smmu_v3_proc.hh:97
gem5::SMMUTranslationProcess::smmuTLBLookup
bool smmuTLBLookup(Yield &yield, TranslResult &tr)
Definition: smmu_v3_transl.cc:380
gem5::SMMUTranslationProcess::recvTick
Tick recvTick
Definition: smmu_v3_transl.hh:102
gem5::SMMUTranslationProcess::hazard4kHold
void hazard4kHold(Yield &yield)
Definition: smmu_v3_transl.cc:1072
gem5::SMMUTranslationProcess::smmuTranslation
TranslResult smmuTranslation(Yield &yield)
Definition: smmu_v3_transl.cc:252
gem5::SMMUTranslationProcess::TranslContext::ttb0
Addr ttb0
Definition: smmu_v3_transl.hh:73
gem5::SMMUTranslationProcess::translateStage1And2
TranslResult translateStage1And2(Yield &yield, Addr addr)
Definition: smmu_v3_transl.cc:883
gem5::SMMUTranslationProcess::SMMUTranslationProcess
SMMUTranslationProcess(const std::string &name, SMMUv3 &_smmu, SMMUv3DeviceInterface &_ifc)
Definition: smmu_v3_transl.cc:82
gem5::ArmISA::asid
asid
Definition: misc_types.hh:617
gem5::WalkCache::Entry
Definition: smmu_v3_caches.hh:295
gem5::SMMUTranslationProcess::configCacheUpdate
void configCacheUpdate(Yield &yield, const TranslContext &tc)
Definition: smmu_v3_transl.cc:549
gem5::SMMUTranslRequest::prefetch
static SMMUTranslRequest prefetch(Addr addr, uint32_t sid, uint32_t ssid)
Definition: smmu_v3_transl.cc:67
gem5::SMMUTranslRequest::addr
Addr addr
Definition: smmu_v3_transl.hh:52
gem5::SMMUTranslRequest::isAtsRequest
bool isAtsRequest
Definition: smmu_v3_transl.hh:58
gem5::SMMUTranslationProcess::TranslResult::addrMask
Addr addrMask
Definition: smmu_v3_transl.hh:93
gem5::SMMUTranslationProcess::context
TranslContext context
Definition: smmu_v3_transl.hh:100
gem5::SMMUTranslationProcess::TranslContext::t0sz
uint8_t t0sz
Definition: smmu_v3_transl.hh:78
gem5::SMMUTranslationProcess::walkStage2
TranslResult walkStage2(Yield &yield, Addr addr, bool final_tr, const PageTableOps *pt_ops, unsigned level, Addr walkPtr)
Definition: smmu_v3_transl.cc:817
gem5::SMMUTranslationProcess::TranslContext
Definition: smmu_v3_transl.hh:69
gem5::SMMUTranslationProcess::hazardIdHold
void hazardIdHold(Yield &yield)
Definition: smmu_v3_transl.cc:1145
GEM5_CLASS_VAR_USED
#define GEM5_CLASS_VAR_USED
Definition: compiler.hh:189
gem5::SMMUTranslationProcess::hazard4kRegister
void hazard4kRegister()
Definition: smmu_v3_transl.cc:1063
gem5::SMMUTranslationProcess::sendEvent
void sendEvent(Yield &yield, const SMMUEvent &ev)
Definition: smmu_v3_transl.cc:1302
gem5::SMMUTranslRequest::fromPacket
static SMMUTranslRequest fromPacket(PacketPtr pkt, bool ats=false)
Definition: smmu_v3_transl.cc:50
gem5::SMMUTranslationProcess::FAULT_PERMISSION
@ FAULT_PERMISSION
Definition: smmu_v3_transl.hh:86
gem5::SMMUTranslRequest::isPrefetch
bool isPrefetch
Definition: smmu_v3_transl.hh:57
gem5::SMMUTranslationProcess::doReadCD
void doReadCD(Yield &yield, ContextDescriptor &cd, const StreamTableEntry &ste, uint32_t sid, uint32_t ssid)
Definition: smmu_v3_transl.cc:1400
gem5::SMMUv3
Definition: smmu_v3.hh:85
gem5::SMMUTranslationProcess::configCacheLookup
bool configCacheLookup(Yield &yield, TranslContext &tc)
Definition: smmu_v3_transl.cc:509
packet.hh
gem5::SMMUTranslationProcess::doReadPTE
void doReadPTE(Yield &yield, Addr va, Addr addr, void *ptr, unsigned stage, unsigned level)
Definition: smmu_v3_transl.cc:1472
gem5::SMMUTranslRequest::isWrite
bool isWrite
Definition: smmu_v3_transl.hh:56
gem5::ContextDescriptor
Definition: smmu_v3_defs.hh:260
gem5::SMMUTranslationProcess::TranslResult::writable
bool writable
Definition: smmu_v3_transl.hh:94
gem5::SMMUProcess::name
const std::string name() const
Definition: smmu_v3_proc.hh:135
gem5::ArmISA::pa
Bitfield< 39, 12 > pa
Definition: misc_types.hh:656
gem5::SMMUTranslationProcess::faultTick
GEM5_CLASS_VAR_USED Tick faultTick
Definition: smmu_v3_transl.hh:103
gem5::SMMUTranslationProcess::~SMMUTranslationProcess
virtual ~SMMUTranslationProcess()
Definition: smmu_v3_transl.cc:96
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::SMMUTranslRequest::pkt
PacketPtr pkt
Definition: smmu_v3_transl.hh:60
gem5::SMMUTranslationProcess::main
virtual void main(Yield &yield)
Definition: smmu_v3_transl.cc:136
gem5::SMMUTranslationProcess::TranslContext::httb
Addr httb
Definition: smmu_v3_transl.hh:73
gem5::SMMUTranslationProcess::walkStage1And2
TranslResult walkStage1And2(Yield &yield, Addr addr, const PageTableOps *pt_ops, unsigned level, Addr walkPtr)
Definition: smmu_v3_transl.cc:733
gem5::SMMUTranslationProcess::hazard4kCheck
bool hazard4kCheck()
Used to force ordering on transactions with same (SID, SSID, 4k page) to avoid multiple identical pag...
Definition: smmu_v3_transl.cc:1046
smmu_v3_ptops.hh
gem5::SMMUTranslationProcess::TranslContext::stage1TranslGranule
uint8_t stage1TranslGranule
Definition: smmu_v3_transl.hh:76
gem5::ArmISA::cd
Bitfield< 32 > cd
Definition: misc_types.hh:251
gem5::SMMUTranslationProcess::TranslResult
Definition: smmu_v3_transl.hh:89
gem5::SMMUTranslationProcess::beginTransaction
void beginTransaction(const SMMUTranslRequest &req)
Definition: smmu_v3_transl.cc:110
gem5::SMMUTranslationProcess::FaultType
FaultType
Definition: smmu_v3_transl.hh:82
compiler.hh
gem5::SMMUTranslationProcess::TranslContext::vmid
uint16_t vmid
Definition: smmu_v3_transl.hh:75
gem5::SMMUv3DeviceInterface
Definition: smmu_v3_deviceifc.hh:58
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::SMMUTranslRequest::size
unsigned size
Definition: smmu_v3_transl.hh:53
smmu_v3_deviceifc.hh
gem5::SMMUTranslationProcess::request
SMMUTranslRequest request
Definition: smmu_v3_transl.hh:99
gem5::ArmISA::va
Bitfield< 8 > va
Definition: misc_types.hh:275
gem5::SMMUTranslationProcess::TranslResult::addr
Addr addr
Definition: smmu_v3_transl.hh:92
gem5::SMMUTranslationProcess::walkCacheUpdate
void walkCacheUpdate(Yield &yield, Addr va, Addr vaMask, Addr pa, unsigned stage, unsigned level, bool leaf, uint8_t permissions)
Definition: smmu_v3_transl.cc:692
gem5::SMMUTranslationProcess::ifcTLBUpdate
void ifcTLBUpdate(Yield &yield, const TranslResult &tr)
Definition: smmu_v3_transl.cc:443
gem5::SMMUTranslationProcess::hazard4kRelease
void hazard4kRelease()
Definition: smmu_v3_transl.cc:1110
gem5::SMMUTranslationProcess::TranslResult::fault
FaultType fault
Definition: smmu_v3_transl.hh:91
gem5::SMMUTranslationProcess::TranslContext::s2t0sz
uint8_t s2t0sz
Definition: smmu_v3_transl.hh:79
gem5::SMMUTranslationProcess::completeTransaction
void completeTransaction(Yield &yield, const TranslResult &tr)
Definition: smmu_v3_transl.cc:1227
smmu_v3_proc.hh
gem5::SMMUTranslationProcess::smmuTLBUpdate
void smmuTLBUpdate(Yield &yield, const TranslResult &tr)
Definition: smmu_v3_transl.cc:480
gem5::SMMUEvent
Definition: smmu_v3_defs.hh:397
gem5::SMMUTranslationProcess::combineTranslations
TranslResult combineTranslations(const TranslResult &s1tr, const TranslResult &s2tr) const
Definition: smmu_v3_transl.cc:1028
gem5::SMMUTranslationProcess::walkCacheLookup
void walkCacheLookup(Yield &yield, const WalkCache::Entry *&walkEntry, Addr addr, uint16_t asid, uint16_t vmid, unsigned stage, unsigned level)
Definition: smmu_v3_transl.cc:651
gem5::SMMUTranslationProcess::TranslContext::asid
uint16_t asid
Definition: smmu_v3_transl.hh:74
gem5::SMMUTranslRequest
Definition: smmu_v3_transl.hh:50
gem5::Coroutine::CallerType
CallerType: A reference to an object of this class will be passed to the coroutine task.
Definition: coroutine.hh:85
gem5::SMMUTranslationProcess::ifcTLBLookup
bool ifcTLBLookup(Yield &yield, TranslResult &tr, bool &wasPrefetched)
Definition: smmu_v3_transl.cc:345
gem5::SMMUTranslationProcess::FAULT_NONE
@ FAULT_NONE
Definition: smmu_v3_transl.hh:84
gem5::SMMUTranslationProcess::doReadConfig
void doReadConfig(Yield &yield, Addr addr, void *ptr, size_t size, uint32_t sid, uint32_t ssid)
Definition: smmu_v3_transl.cc:1464
gem5::SMMUTranslationProcess::TranslContext::stage1Enable
bool stage1Enable
Definition: smmu_v3_transl.hh:71
gem5::SMMUTranslationProcess::findConfig
bool findConfig(Yield &yield, TranslContext &tc, TranslResult &tr)
Definition: smmu_v3_transl.cc:581
gem5::SMMUTranslationProcess::bypass
TranslResult bypass(Addr addr) const
Definition: smmu_v3_transl.cc:240
gem5::SMMUTranslationProcess::TranslContext::stage2Enable
bool stage2Enable
Definition: smmu_v3_transl.hh:72
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::SMMUTranslationProcess::microTLBLookup
bool microTLBLookup(Yield &yield, TranslResult &tr)
Definition: smmu_v3_transl.cc:314
gem5::SMMUTranslationProcess::doReadSTE
void doReadSTE(Yield &yield, StreamTableEntry &ste, uint32_t sid)
Definition: smmu_v3_transl.cc:1332
gem5::PageTableOps
Definition: smmu_v3_ptops.hh:48
gem5::SMMUTranslationProcess::translateStage2
TranslResult translateStage2(Yield &yield, Addr addr, bool final_tr)
Definition: smmu_v3_transl.cc:939
gem5::SMMUTranslationProcess
Definition: smmu_v3_transl.hh:66
gem5::SMMUTranslationProcess::TranslContext::stage2TranslGranule
uint8_t stage2TranslGranule
Definition: smmu_v3_transl.hh:77
gem5::SMMUTranslationProcess::completePrefetch
void completePrefetch(Yield &yield)
Definition: smmu_v3_transl.cc:1289
gem5::SMMUTranslationProcess::resumeTransaction
void resumeTransaction()
Definition: smmu_v3_transl.cc:118
gem5::SMMUTranslationProcess::ifc
SMMUv3DeviceInterface & ifc
Definition: smmu_v3_transl.hh:97
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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