gem5 v24.0.0.0
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static_register_manager_policy.cc
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1/*
2 * Copyright (c) 2016 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice,
12 * this list of conditions and the following disclaimer in the documentation
13 * and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
33
34#include "config/the_gpu_isa.hh"
35#include "debug/GPURename.hh"
39#include "gpu-compute/shader.hh"
42
43namespace gem5
44{
45
49
50void
54
55int
57{
58 panic_if((vgprIndex >= w->reservedVectorRegs)
59 || (w->reservedVectorRegs < 0),
60 "VGPR index %d is out of range: VGPR range=[0,%d]",
61 vgprIndex, w->reservedVectorRegs);
62
63 // add the offset from where the VGPRs of the wavefront have been assigned
64 int physicalVgprIndex = w->startVgprIndex + vgprIndex;
65
66 panic_if(!((w->startVgprIndex <= physicalVgprIndex) &&
67 (w->startVgprIndex + w->reservedVectorRegs - 1)
68 >= physicalVgprIndex),
69 "Invalid VGPR index %d\n", physicalVgprIndex);
70
71 // calculate physical VGPR index
72 return physicalVgprIndex % w->computeUnit->vrf[w->simdId]->numRegs();
73}
74
75int
77{
78 panic_if(!((sgprIndex < w->reservedScalarRegs)
79 && (w->reservedScalarRegs > 0)),
80 "SGPR index %d is out of range: SGPR range=[0,%d]\n",
81 sgprIndex, w->reservedScalarRegs);
82
83 // add the offset from where the SGPRs of the wavefront have been assigned
84 int physicalSgprIndex = w->startSgprIndex + sgprIndex;
85
86 panic_if(!((w->startSgprIndex <= physicalSgprIndex) &&
87 (w->startSgprIndex + w->reservedScalarRegs - 1)
88 >= physicalSgprIndex),
89 "Invalid SGPR index %d\n", physicalSgprIndex);
90
91 // calculate physical SGPR index
92 return physicalSgprIndex % w->computeUnit->srf[w->simdId]->numRegs();
93}
94
95bool
97 int demandPerWf)
98{
99 return cu->registerManager->vrfPoolMgrs[simdId]->
100 canAllocate(nWfs, demandPerWf);
101}
102
103bool
105 int demandPerWf)
106{
107 return cu->registerManager->srfPoolMgrs[simdId]->
108 canAllocate(nWfs, demandPerWf);
109}
110
111void
113 int scalarDemand)
114{
115 uint32_t allocatedSize = 0;
116 w->startVgprIndex = cu->registerManager->vrfPoolMgrs[w->simdId]->
117 allocateRegion(vectorDemand, &allocatedSize);
118 w->reservedVectorRegs = allocatedSize;
119 cu->vectorRegsReserved[w->simdId] += w->reservedVectorRegs;
121 "VRF[%d] has been overallocated %d > %d\n",
122 w->simdId, cu->vectorRegsReserved[w->simdId],
124
125 if (scalarDemand) {
126 w->startSgprIndex = cu->registerManager->srfPoolMgrs[w->simdId]->
127 allocateRegion(scalarDemand, &allocatedSize);
128 w->reservedScalarRegs = allocatedSize;
129 cu->scalarRegsReserved[w->simdId] += w->reservedScalarRegs;
131 "SRF[%d] has been overallocated %d > %d\n",
132 w->simdId, cu->scalarRegsReserved[w->simdId],
134 }
135}
136
137void
139{
140 // free the vector registers of the completed wavefront
141 w->computeUnit->vectorRegsReserved[w->simdId] -= w->reservedVectorRegs;
142 // free the scalar registers of the completed wavefront
143 w->computeUnit->scalarRegsReserved[w->simdId] -= w->reservedScalarRegs;
144
145 panic_if(w->computeUnit->vectorRegsReserved[w->simdId] < 0,
146 "Freeing VRF[%d] registers left %d registers reserved\n",
147 w->simdId,
148 w->computeUnit->vectorRegsReserved[w->simdId]);
149 panic_if(w->computeUnit->scalarRegsReserved[w->simdId] < 0,
150 "Freeing SRF[%d] registers left %d registers reserved\n",
151 w->simdId,
152 w->computeUnit->scalarRegsReserved[w->simdId]);
153
154 // Current dynamic register allocation does not handle wraparound
155 int endIndex = w->startVgprIndex + w->reservedVectorRegs;
156
157 w->computeUnit->registerManager->vrfPoolMgrs[w->simdId]->
158 freeRegion(w->startVgprIndex, endIndex);
159
160 // mark/pre-mark all registers are not busy
161 for (int i = 0; i < w->reservedVectorRegs; i++) {
162 uint32_t physVgprIdx = mapVgpr(w, i);
163 w->computeUnit->vrf[w->simdId]->markReg(physVgprIdx, false);
164 }
165
166 w->reservedVectorRegs = 0;
167 w->startVgprIndex = 0;
168
169 endIndex = w->startSgprIndex + w->reservedScalarRegs;
170 w->computeUnit->registerManager->srfPoolMgrs[w->simdId]->
171 freeRegion(w->startSgprIndex, endIndex);
172
173 // mark/pre-mark all registers are not busy
174 for (int i = 0; i < w->reservedScalarRegs; i++) {
175 uint32_t physSgprIdx = mapSgpr(w, i);
176 w->computeUnit->srf[w->simdId]->markReg(physSgprIdx, false);
177 }
178
179 w->reservedScalarRegs = 0;
180 w->startSgprIndex = 0;
181}
182
183} // namespace gem5
std::vector< int > vectorRegsReserved
RegisterManager * registerManager
std::vector< int > scalarRegsReserved
std::vector< PoolManager * > vrfPoolMgrs
std::vector< PoolManager * > srfPoolMgrs
bool canAllocateSgprs(int simdId, int nWfs, int demandPerWf) override
void allocateRegisters(Wavefront *w, int vectorDemand, int scalarDemand) override
int mapSgpr(Wavefront *w, int sgprIndex) override
int mapVgpr(Wavefront *w, int vgprIndex) override
bool canAllocateVgprs(int simdId, int nWfs, int demandPerWf) override
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition logging.hh:214
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 0 > w
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36

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