38#ifndef __ARCH_ARM_SVE_MEM_HH__
39#define __ARCH_ARM_SVE_MEM_HH__
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
SveContigMemSI(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _gp, RegIndex _base, uint64_t _imm)
bool baseIsSP
True if the base register is SP (used for SP alignment checking).
SveContigMemSS(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _gp, RegIndex _base, RegIndex _offset)
bool baseIsSP
True if the base register is SP (used for SP alignment checking).
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
bool baseIsSP
True if the base register is SP (used for SP alignment checking).
SveMemPredFillSpill(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _base, uint64_t _imm)
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
SveMemVecFillSpill(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _base, uint64_t _imm)
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
bool baseIsSP
True if the base register is SP (used for SP alignment checking).
static bool isSP(RegIndex reg)
Copyright (c) 2024 Arm Limited All rights reserved.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.