gem5 v24.0.0.0
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mmu.hh
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1/*
2 * Copyright (c) 2020 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
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20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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36 */
37
38#ifndef __ARCH_X86_MMU_HH__
39#define __ARCH_X86_MMU_HH__
40
41#include "arch/generic/mmu.hh"
42#include "arch/x86/page_size.hh"
43#include "arch/x86/tlb.hh"
44
45#include "params/X86MMU.hh"
46
47namespace gem5
48{
49
50namespace X86ISA {
51
52class MMU : public BaseMMU
53{
54 public:
55 MMU(const X86MMUParams &p)
56 : BaseMMU(p)
57 {}
58
59 void
61 {
62 static_cast<TLB*>(itb)->flushNonGlobal();
63 static_cast<TLB*>(dtb)->flushNonGlobal();
64 }
65
66 Walker*
68 {
69 return static_cast<TLB*>(dtb)->getWalker();
70 }
71
74 Mode mode, Request::Flags flags) override
75 {
77 PageBytes, start, size, tc, this, mode, flags));
78 }
79};
80
81} // namespace X86ISA
82} // namespace gem5
83
84#endif // __ARCH_X86_MMU_HH__
BaseTLB * itb
Definition mmu.hh:159
BaseTLB * dtb
Definition mmu.hh:158
ThreadContext is the external interface to all thread state for anything outside of the CPU.
MMU(const X86MMUParams &p)
Definition mmu.hh:55
TranslationGenPtr translateFunctional(Addr start, Addr size, ThreadContext *tc, Mode mode, Request::Flags flags) override
Returns a translation generator for a region of virtual addresses, instead of directly translating a ...
Definition mmu.hh:73
Walker * getDataWalker()
Definition mmu.hh:67
void flushNonGlobal()
Definition mmu.hh:60
uint8_t flags
Definition helpers.cc:87
Bitfield< 3 > mode
Definition types.hh:192
Bitfield< 0 > p
Definition pagetable.hh:151
const Addr PageBytes
Definition page_size.hh:49
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
std::unique_ptr< TranslationGen > TranslationGenPtr

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