gem5  v21.1.0.2
pagetable_walker.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2007 The Hewlett-Packard Development Company
3  * All rights reserved.
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef __ARCH_X86_PAGE_TABLE_WALKER_HH__
39 #define __ARCH_X86_PAGE_TABLE_WALKER_HH__
40 
41 #include <vector>
42 
43 #include "arch/generic/mmu.hh"
44 #include "arch/x86/pagetable.hh"
45 #include "arch/x86/tlb.hh"
46 #include "base/types.hh"
47 #include "mem/packet.hh"
48 #include "params/X86PagetableWalker.hh"
49 #include "sim/clocked_object.hh"
50 #include "sim/faults.hh"
51 #include "sim/system.hh"
52 
53 namespace gem5
54 {
55 
56 class ThreadContext;
57 
58 namespace X86ISA
59 {
60  class Walker : public ClockedObject
61  {
62  protected:
63  // Port for accessing memory
64  class WalkerPort : public RequestPort
65  {
66  public:
67  WalkerPort(const std::string &_name, Walker * _walker) :
68  RequestPort(_name, _walker), walker(_walker)
69  {}
70 
71  protected:
73 
74  bool recvTimingResp(PacketPtr pkt);
75  void recvReqRetry();
76  };
77 
78  friend class WalkerPort;
80 
81  // State to track each walk of the page table
83  {
84  friend class Walker;
85  private:
86  enum State
87  {
90  // Long mode
92  // PAE legacy mode
94  // Non PAE legacy mode with and without PSE
96  };
97 
98  protected:
104  int dataSize;
105  bool enableNX;
106  unsigned inflight;
114  bool timing;
115  bool retrying;
116  bool started;
117  bool squashed;
118  public:
119  WalkerState(Walker * _walker, BaseMMU::Translation *_translation,
120  const RequestPtr &_req, bool _isFunctional = false) :
121  walker(_walker), req(_req), state(Ready),
122  nextState(Ready), inflight(0),
123  translation(_translation),
124  functional(_isFunctional), timing(false),
125  retrying(false), started(false), squashed(false)
126  {
127  }
128  void initState(ThreadContext * _tc, BaseMMU::Mode _mode,
129  bool _isTiming = false);
130  Fault startWalk();
131  Fault startFunctional(Addr &addr, unsigned &logBytes);
132  bool recvPacket(PacketPtr pkt);
133  unsigned numInflight() const;
134  bool isRetrying();
135  bool wasStarted();
136  bool isTiming();
137  void retry();
138  void squash();
139  std::string name() const {return walker->name();}
140 
141  private:
142  void setupWalk(Addr vaddr);
143  Fault stepWalk(PacketPtr &write);
144  void sendPackets();
145  void endWalk();
146  Fault pageFault(bool present);
147  };
148 
149  friend class WalkerState;
150  // State for timing and atomic accesses (need multiple per walker in
151  // the case of multiple outstanding requests in timing mode)
153  // State for functional accesses (only need one of these per walker)
155 
157  {
160  senderWalk(_senderWalk) {}
161  };
162 
163  public:
164  // Kick off the state machine.
165  Fault start(ThreadContext * _tc, BaseMMU::Translation *translation,
166  const RequestPtr &req, BaseMMU::Mode mode);
168  unsigned &logBytes, BaseMMU::Mode mode);
169  Port &getPort(const std::string &if_name,
170  PortID idx=InvalidPortID) override;
171 
172  protected:
173  // The TLB we're supposed to load.
174  TLB * tlb;
177 
178  // The number of outstanding walks that can be squashed per cycle.
179  unsigned numSquashable;
180 
181  // Wrapper for checking for squashes before starting a translation.
182  void startWalkWrapper();
183 
188 
189  // Functions for dealing with packets.
190  bool recvTimingResp(PacketPtr pkt);
191  void recvReqRetry();
192  bool sendTiming(WalkerState * sendingState, PacketPtr pkt);
193 
194  public:
195 
196  void setTLB(TLB * _tlb)
197  {
198  tlb = _tlb;
199  }
200 
201  using Params = X86PagetableWalkerParams;
202 
203  Walker(const Params &params) :
204  ClockedObject(params), port(name() + ".port", this),
205  funcState(this, NULL, NULL, true), tlb(NULL), sys(params.system),
206  requestorId(sys->getRequestorId(this)),
207  numSquashable(params.num_squash_per_cycle),
209  {
210  }
211  };
212 
213 } // namespace X86ISA
214 } // namespace gem5
215 
216 #endif // __ARCH_X86_PAGE_TABLE_WALKER_HH__
gem5::X86ISA::Walker::WalkerSenderState
Definition: pagetable_walker.hh:156
gem5::X86ISA::Walker::WalkerState::LongPDP
@ LongPDP
Definition: pagetable_walker.hh:91
gem5::PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:252
pagetable.hh
gem5::X86ISA::Walker::WalkerPort::WalkerPort
WalkerPort(const std::string &_name, Walker *_walker)
Definition: pagetable_walker.hh:67
gem5::X86ISA::Walker::WalkerState::startWalk
Fault startWalk()
Definition: pagetable_walker.cc:229
gem5::X86ISA::Walker::WalkerState::state
State state
Definition: pagetable_walker.hh:102
gem5::X86ISA::Walker::WalkerState::entry
TlbEntry entry
Definition: pagetable_walker.hh:107
gem5::X86ISA::Walker::WalkerState::Ready
@ Ready
Definition: pagetable_walker.hh:88
system.hh
gem5::X86ISA::Walker::WalkerState::translation
BaseMMU::Translation * translation
Definition: pagetable_walker.hh:111
gem5::X86ISA::Walker::WalkerState::started
bool started
Definition: pagetable_walker.hh:116
gem5::X86ISA::Walker::WalkerState::isTiming
bool isTiming()
Definition: pagetable_walker.cc:706
gem5::X86ISA::Walker::recvReqRetry
void recvReqRetry()
Definition: pagetable_walker.cc:144
gem5::X86ISA::Walker::WalkerState::read
PacketPtr read
Definition: pagetable_walker.hh:108
gem5::BaseMMU::Mode
Mode
Definition: mmu.hh:53
gem5::X86ISA::Walker::WalkerState::dataSize
int dataSize
Definition: pagetable_walker.hh:104
gem5::X86ISA::Walker::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Definition: pagetable_walker.cc:110
gem5::X86ISA::Walker::WalkerState::inflight
unsigned inflight
Definition: pagetable_walker.hh:106
gem5::X86ISA::Walker::WalkerState::tc
ThreadContext * tc
Definition: pagetable_walker.hh:100
gem5::X86ISA::Walker::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: pagetable_walker.cc:172
gem5::X86ISA::Walker::WalkerState::PAEPTE
@ PAEPTE
Definition: pagetable_walker.hh:93
gem5::X86ISA::Walker::WalkerState::writes
std::vector< PacketPtr > writes
Definition: pagetable_walker.hh:109
gem5::X86ISA::Walker::WalkerState::startFunctional
Fault startFunctional(Addr &addr, unsigned &logBytes)
Definition: pagetable_walker.cc:258
gem5::X86ISA::Walker::WalkerState
Definition: pagetable_walker.hh:82
gem5::X86ISA::Walker::WalkerSenderState::senderWalk
WalkerState * senderWalk
Definition: pagetable_walker.hh:158
gem5::X86ISA::Walker::WalkerState::sendPackets
void sendPackets()
Definition: pagetable_walker.cc:661
gem5::X86ISA::Walker::start
Fault start(ThreadContext *_tc, BaseMMU::Translation *translation, const RequestPtr &req, BaseMMU::Mode mode)
Definition: pagetable_walker.cc:71
gem5::X86ISA::Walker::WalkerState::WalkerState
WalkerState(Walker *_walker, BaseMMU::Translation *_translation, const RequestPtr &_req, bool _isFunctional=false)
Definition: pagetable_walker.hh:119
gem5::X86ISA::Walker::WalkerState::enableNX
bool enableNX
Definition: pagetable_walker.hh:105
gem5::X86ISA::Walker::WalkerState::LongPML4
@ LongPML4
Definition: pagetable_walker.hh:91
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:1003
std::vector
STL vector class.
Definition: stl.hh:37
gem5::X86ISA::Walker::currStates
std::list< WalkerState * > currStates
Definition: pagetable_walker.hh:152
gem5::X86ISA::Walker
Definition: pagetable_walker.hh:60
gem5::X86ISA::Walker::WalkerState::squashed
bool squashed
Definition: pagetable_walker.hh:117
gem5::X86ISA::Walker::requestorId
RequestorID requestorId
Definition: pagetable_walker.hh:176
gem5::X86ISA::Walker::WalkerState::functional
bool functional
Definition: pagetable_walker.hh:113
gem5::InvalidPortID
const PortID InvalidPortID
Definition: types.hh:253
faults.hh
gem5::X86ISA::Walker::WalkerState::LongPTE
@ LongPTE
Definition: pagetable_walker.hh:91
gem5::X86ISA::Walker::port
WalkerPort port
Definition: pagetable_walker.hh:79
gem5::X86ISA::Walker::WalkerState::setupWalk
void setupWalk(Addr vaddr)
Definition: pagetable_walker.cc:551
gem5::X86ISA::Walker::WalkerPort
Definition: pagetable_walker.hh:64
gem5::X86ISA::Walker::WalkerState::PAEPD
@ PAEPD
Definition: pagetable_walker.hh:93
gem5::X86ISA::Walker::WalkerState::recvPacket
bool recvPacket(PacketPtr pkt)
Definition: pagetable_walker.cc:601
packet.hh
gem5::RequestPort
A RequestPort is a specialisation of a Port, which implements the default protocol for the three diff...
Definition: port.hh:77
gem5::X86ISA::TlbEntry
Definition: pagetable.hh:65
gem5::X86ISA::Walker::WalkerState::endWalk
void endWalk()
Definition: pagetable_walker.cc:543
gem5::X86ISA::Walker::WalkerState::name
std::string name() const
Definition: pagetable_walker.hh:139
gem5::X86ISA::present
Bitfield< 7 > present
Definition: misc.hh:998
gem5::X86ISA::Walker::WalkerState::timingFault
Fault timingFault
Definition: pagetable_walker.hh:110
gem5::X86ISA::Walker::WalkerState::retry
void retry()
Definition: pagetable_walker.cc:724
gem5::System
Definition: system.hh:77
gem5::X86ISA::Walker::WalkerState::PSEPD
@ PSEPD
Definition: pagetable_walker.hh:95
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
gem5::Named::name
virtual std::string name() const
Definition: named.hh:47
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:255
gem5::SimObject::params
const Params & params() const
Definition: sim_object.hh:176
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
gem5::X86ISA::Walker::Params
X86PagetableWalkerParams Params
Definition: pagetable_walker.hh:201
gem5::X86ISA::Walker::sendTiming
bool sendTiming(WalkerState *sendingState, PacketPtr pkt)
Definition: pagetable_walker.cc:155
gem5::RequestPtr
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
mmu.hh
gem5::X86ISA::Walker::WalkerState::nextState
State nextState
Definition: pagetable_walker.hh:103
gem5::X86ISA::Walker::WalkerSenderState::WalkerSenderState
WalkerSenderState(WalkerState *_senderWalk)
Definition: pagetable_walker.hh:159
gem5::X86ISA::Walker::funcState
WalkerState funcState
Definition: pagetable_walker.hh:154
gem5::X86ISA::Walker::WalkerState::PAEPDP
@ PAEPDP
Definition: pagetable_walker.hh:93
gem5::Packet::SenderState
A virtual base opaque structure used to hold state associated with the packet (e.g....
Definition: packet.hh:457
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::X86ISA::Walker::numSquashable
unsigned numSquashable
Definition: pagetable_walker.hh:179
gem5::ClockedObject
The ClockedObject class extends the SimObject with a clock and accessor functions to relate ticks to ...
Definition: clocked_object.hh:234
gem5::X86ISA::Walker::Walker
Walker(const Params &params)
Definition: pagetable_walker.hh:203
gem5::X86ISA::Walker::WalkerState::Waiting
@ Waiting
Definition: pagetable_walker.hh:89
gem5::EventFunctionWrapper
Definition: eventq.hh:1115
gem5::BaseMMU::Translation
Definition: mmu.hh:55
gem5::X86ISA::Walker::WalkerState::walker
Walker * walker
Definition: pagetable_walker.hh:99
gem5::X86ISA::TLB
Definition: tlb.hh:60
gem5::X86ISA::Walker::WalkerPort::recvReqRetry
void recvReqRetry()
Called by the peer if sendTimingReq was called on this peer (causing recvTimingReq to be called on th...
Definition: pagetable_walker.cc:138
gem5::X86ISA::Walker::startFunctional
Fault startFunctional(ThreadContext *_tc, Addr &addr, unsigned &logBytes, BaseMMU::Mode mode)
Definition: pagetable_walker.cc:96
gem5::Port
Ports are used to interface objects to each other.
Definition: port.hh:61
gem5::X86ISA::Walker::WalkerState::isRetrying
bool isRetrying()
Definition: pagetable_walker.cc:700
gem5::X86ISA::Walker::WalkerState::State
State
Definition: pagetable_walker.hh:86
gem5::X86ISA::Walker::setTLB
void setTLB(TLB *_tlb)
Definition: pagetable_walker.hh:196
types.hh
gem5::X86ISA::Walker::WalkerState::req
RequestPtr req
Definition: pagetable_walker.hh:101
gem5::X86ISA::Walker::WalkerState::wasStarted
bool wasStarted()
Definition: pagetable_walker.cc:712
gem5::X86ISA::Walker::WalkerState::LongPD
@ LongPD
Definition: pagetable_walker.hh:91
clocked_object.hh
gem5::X86ISA::Walker::WalkerState::numInflight
unsigned numInflight() const
Definition: pagetable_walker.cc:694
gem5::X86ISA::Walker::WalkerState::mode
BaseMMU::Mode mode
Definition: pagetable_walker.hh:112
gem5::X86ISA::Walker::WalkerState::retrying
bool retrying
Definition: pagetable_walker.hh:115
gem5::RequestorID
uint16_t RequestorID
Definition: request.hh:95
gem5::MipsISA::vaddr
vaddr
Definition: pra_constants.hh:278
tlb.hh
std::list
STL list class.
Definition: stl.hh:51
gem5::X86ISA::Walker::tlb
TLB * tlb
Definition: pagetable_walker.hh:174
gem5::X86ISA::Walker::startWalkWrapperEvent
EventFunctionWrapper startWalkWrapperEvent
Event used to call startWalkWrapper.
Definition: pagetable_walker.hh:187
gem5::X86ISA::Walker::WalkerState::stepWalk
Fault stepWalk(PacketPtr &write)
Definition: pagetable_walker.cc:282
gem5::X86ISA::Walker::WalkerPort::walker
Walker * walker
Definition: pagetable_walker.hh:72
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::X86ISA::Walker::WalkerState::pageFault
Fault pageFault(bool present)
Definition: pagetable_walker.cc:731
gem5::X86ISA::Walker::WalkerState::PD
@ PD
Definition: pagetable_walker.hh:95
gem5::X86ISA::Walker::WalkerState::initState
void initState(ThreadContext *_tc, BaseMMU::Mode _mode, bool _isTiming=false)
Definition: pagetable_walker.cc:181
gem5::X86ISA::Walker::startWalkWrapper
void startWalkWrapper()
Definition: pagetable_walker.cc:192
gem5::X86ISA::Walker::WalkerState::squash
void squash()
Definition: pagetable_walker.cc:718
gem5::ArmISA::PTE
Definition: pagetable.hh:61
gem5::Named::_name
const std::string _name
Definition: named.hh:41
gem5::X86ISA::Walker::WalkerState::timing
bool timing
Definition: pagetable_walker.hh:114
gem5::X86ISA::Walker::sys
System * sys
Definition: pagetable_walker.hh:175
gem5::ArmISA::mode
Bitfield< 4, 0 > mode
Definition: misc_types.hh:73
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::X86ISA::Walker::WalkerPort::recvTimingResp
bool recvTimingResp(PacketPtr pkt)
Receive a timing response from the peer.
Definition: pagetable_walker.cc:104

Generated on Tue Sep 21 2021 12:24:51 for gem5 by doxygen 1.8.17