gem5
v19.0.0.0
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ExecContext bears the exec_context interface for Minor. More...
#include <exec_context.hh>
Public Member Functions | |
ExecContext (MinorCPU &cpu_, SimpleThread &thread_, Execute &execute_, MinorDynInstPtr inst_) | |
~ExecContext () | |
Fault | initiateMemRead (Addr addr, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) override |
Initiate a timing memory read operation. More... | |
Fault | writeMem (uint8_t *data, unsigned int size, Addr addr, Request::Flags flags, uint64_t *res, const std::vector< bool > &byte_enable=std::vector< bool >()) override |
For atomic-mode contexts, perform an atomic memory write operation. More... | |
Fault | initiateMemAMO (Addr addr, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) override |
For timing-mode contexts, initiate an atomic AMO (atomic read-modify-write memory operation) More... | |
RegVal | readIntRegOperand (const StaticInst *si, int idx) override |
Reads an integer register. More... | |
RegVal | readFloatRegOperandBits (const StaticInst *si, int idx) override |
Reads a floating point register in its binary format, instead of by value. More... | |
const TheISA::VecRegContainer & | readVecRegOperand (const StaticInst *si, int idx) const override |
Vector Register Interfaces. More... | |
TheISA::VecRegContainer & | getWritableVecRegOperand (const StaticInst *si, int idx) override |
Gets destination vector register operand for modification. More... | |
TheISA::VecElem | readVecElemOperand (const StaticInst *si, int idx) const override |
Vector Elem Interfaces. More... | |
const TheISA::VecPredRegContainer & | readVecPredRegOperand (const StaticInst *si, int idx) const override |
Predicate registers interface. More... | |
TheISA::VecPredRegContainer & | getWritableVecPredRegOperand (const StaticInst *si, int idx) override |
Gets destination predicate register operand for modification. More... | |
void | setIntRegOperand (const StaticInst *si, int idx, RegVal val) override |
Sets an integer register to a value. More... | |
void | setFloatRegOperandBits (const StaticInst *si, int idx, RegVal val) override |
Sets the bits of a floating point register of single width to a binary value. More... | |
void | setVecRegOperand (const StaticInst *si, int idx, const TheISA::VecRegContainer &val) override |
void | setVecPredRegOperand (const StaticInst *si, int idx, const TheISA::VecPredRegContainer &val) override |
void | setVecElemOperand (const StaticInst *si, int idx, const TheISA::VecElem val) override |
Sets a vector register to a value. More... | |
bool | readPredicate () const override |
void | setPredicate (bool val) override |
bool | readMemAccPredicate () const override |
void | setMemAccPredicate (bool val) override |
TheISA::PCState | pcState () const override |
void | pcState (const TheISA::PCState &val) override |
RegVal | readMiscRegNoEffect (int misc_reg) const |
RegVal | readMiscReg (int misc_reg) override |
Reads a miscellaneous register, handling any architectural side effects due to reading that register. More... | |
void | setMiscReg (int misc_reg, RegVal val) override |
Sets a miscellaneous register, handling any architectural side effects due to writing that register. More... | |
RegVal | readMiscRegOperand (const StaticInst *si, int idx) override |
void | setMiscRegOperand (const StaticInst *si, int idx, RegVal val) override |
void | syscall (Fault *fault) override |
Executes a syscall. More... | |
ThreadContext * | tcBase () override |
Returns a pointer to the ThreadContext. More... | |
unsigned int | readStCondFailures () const override |
Returns the number of consecutive store conditional failures. More... | |
void | setStCondFailures (unsigned int st_cond_failures) override |
Sets the number of consecutive store conditional failures. More... | |
ContextID | contextId () |
void | demapPage (Addr vaddr, uint64_t asn) override |
Invalidate a page in the DTLB and ITLB. More... | |
RegVal | readCCRegOperand (const StaticInst *si, int idx) override |
void | setCCRegOperand (const StaticInst *si, int idx, RegVal val) override |
void | demapInstPage (Addr vaddr, uint64_t asn) |
void | demapDataPage (Addr vaddr, uint64_t asn) |
BaseCPU * | getCpuPtr () |
void | armMonitor (Addr address) override |
bool | mwait (PacketPtr pkt) override |
void | mwaitAtomic (ThreadContext *tc) override |
AddressMonitor * | getAddrMonitor () override |
ConstVecLane8 | readVec8BitLaneOperand (const StaticInst *si, int idx) const override |
Vector Register Lane Interfaces. More... | |
ConstVecLane16 | readVec16BitLaneOperand (const StaticInst *si, int idx) const override |
Reads source vector 16bit operand. More... | |
ConstVecLane32 | readVec32BitLaneOperand (const StaticInst *si, int idx) const override |
Reads source vector 32bit operand. More... | |
ConstVecLane64 | readVec64BitLaneOperand (const StaticInst *si, int idx) const override |
Reads source vector 64bit operand. More... | |
template<typename LD > | |
void | setVecLaneOperandT (const StaticInst *si, int idx, const LD &val) |
Write a lane of the destination vector operand. More... | |
virtual void | setVecLaneOperand (const StaticInst *si, int idx, const LaneData< LaneSize::Byte > &val) override |
Write a lane of the destination vector operand. More... | |
virtual void | setVecLaneOperand (const StaticInst *si, int idx, const LaneData< LaneSize::TwoByte > &val) override |
virtual void | setVecLaneOperand (const StaticInst *si, int idx, const LaneData< LaneSize::FourByte > &val) override |
virtual void | setVecLaneOperand (const StaticInst *si, int idx, const LaneData< LaneSize::EightByte > &val) override |
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virtual void | setVecRegOperand (const StaticInst *si, int idx, const VecRegContainer &val)=0 |
Sets a destination vector register operand to a value. More... | |
virtual void | setVecPredRegOperand (const StaticInst *si, int idx, const VecPredRegContainer &val)=0 |
Sets a destination predicate register operand to a value. More... | |
virtual Fault | readMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >()) |
Perform an atomic memory read operation. More... | |
virtual Fault | amoMem (Addr addr, uint8_t *data, unsigned int size, Request::Flags flags, AtomicOpFunctorPtr amo_op) |
For atomic-mode contexts, perform an atomic AMO (a.k.a., Atomic Read-Modify-Write Memory Operation) More... | |
Public Attributes | |
MinorCPU & | cpu |
SimpleThread & | thread |
ThreadState object, provides all the architectural state. More... | |
Execute & | execute |
The execute stage so we can peek at its contents. More... | |
MinorDynInstPtr | inst |
Instruction for the benefit of memory operations and for PC. More... | |
Additional Inherited Members | |
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typedef TheISA::PCState | PCState |
using | VecRegContainer = TheISA::VecRegContainer |
using | VecElem = TheISA::VecElem |
using | VecPredRegContainer = TheISA::VecPredRegContainer |
ExecContext bears the exec_context interface for Minor.
This nicely separates that interface from other classes such as Pipeline, MinorCPU and DynMinorInst and makes it easier to see what state is accessed by it.
Definition at line 74 of file exec_context.hh.
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inline |
Definition at line 88 of file exec_context.hh.
References DPRINTF, pcState(), SimpleThread::setFloatReg(), SimpleThread::setIntReg(), setMemAccPredicate(), setPredicate(), and AlphaISA::ZeroReg.
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Definition at line 107 of file exec_context.hh.
References readMemAccPredicate(), and readPredicate().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 445 of file exec_context.hh.
References BaseCPU::armMonitor(), and getCpuPtr().
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Definition at line 402 of file exec_context.hh.
References SimpleThread::contextId().
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inline |
Definition at line 436 of file exec_context.hh.
References BaseTLB::demapPage(), and SimpleThread::getDTBPtr().
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Definition at line 430 of file exec_context.hh.
References BaseTLB::demapPage(), and SimpleThread::getITBPtr().
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inlineoverridevirtual |
Invalidate a page in the DTLB and ITLB.
Implements ExecContext.
Definition at line 407 of file exec_context.hh.
References BaseTLB::demapPage(), SimpleThread::getDTBPtr(), and SimpleThread::getITBPtr().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 454 of file exec_context.hh.
References BaseCPU::getCpuAddrMonitor(), and getCpuPtr().
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Definition at line 441 of file exec_context.hh.
References cpu.
Referenced by armMonitor(), getAddrMonitor(), mwait(), and mwaitAtomic().
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Gets destination predicate register operand for modification.
Implements ExecContext.
Definition at line 193 of file exec_context.hh.
References StaticInst::destRegIdx(), SimpleThread::getWritableVecPredReg(), RegId::isVecPredReg(), and X86ISA::reg.
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inlineoverridevirtual |
Gets destination vector register operand for modification.
Implements ExecContext.
Definition at line 169 of file exec_context.hh.
References StaticInst::destRegIdx(), SimpleThread::getWritableVecReg(), RegId::isVecReg(), and X86ISA::reg.
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inlineoverridevirtual |
For timing-mode contexts, initiate an atomic AMO (atomic read-modify-write memory operation)
Reimplemented from ExecContext.
Definition at line 136 of file exec_context.hh.
References Minor::Execute::getLSQ(), and Minor::LSQ::pushRequest().
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inlineoverridevirtual |
Initiate a timing memory read operation.
Must be overridden for exec contexts that support timing memory mode. Not pure virtual since exec contexts that only support atomic memory mode need not override (though in that case this function should never be called).
Reimplemented from ExecContext.
Definition at line 114 of file exec_context.hh.
References Minor::Execute::getLSQ(), and Minor::LSQ::pushRequest().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 448 of file exec_context.hh.
References getCpuPtr(), and BaseCPU::mwait().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 451 of file exec_context.hh.
References SimpleThread::dtb, getCpuPtr(), and BaseCPU::mwaitAtomic().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 345 of file exec_context.hh.
References SimpleThread::pcState().
Referenced by ExecContext().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 351 of file exec_context.hh.
References SimpleThread::pcState().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 414 of file exec_context.hh.
References RegId::index(), RegId::isCCReg(), SimpleThread::readCCReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Reads a floating point register in its binary format, instead of by value.
Implements ExecContext.
Definition at line 153 of file exec_context.hh.
References RegId::index(), RegId::isFloatReg(), SimpleThread::readFloatReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Reads an integer register.
Implements ExecContext.
Definition at line 145 of file exec_context.hh.
References RegId::index(), RegId::isIntReg(), SimpleThread::readIntReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 333 of file exec_context.hh.
References SimpleThread::readMemAccPredicate().
Referenced by Minor::Execute::executeMemRefInst(), Minor::Execute::handleMemResponse(), and ~ExecContext().
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inlineoverridevirtual |
Reads a miscellaneous register, handling any architectural side effects due to reading that register.
Implements ExecContext.
Definition at line 363 of file exec_context.hh.
References SimpleThread::readMiscReg().
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Definition at line 357 of file exec_context.hh.
References SimpleThread::readMiscRegNoEffect().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 375 of file exec_context.hh.
References RegId::index(), RegId::isMiscReg(), SimpleThread::readMiscReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 321 of file exec_context.hh.
References SimpleThread::readPredicate().
Referenced by Minor::Execute::commitInst(), Minor::Execute::executeMemRefInst(), Minor::Execute::handleMemResponse(), and ~ExecContext().
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inlineoverridevirtual |
Returns the number of consecutive store conditional failures.
Implements ExecContext.
Definition at line 399 of file exec_context.hh.
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inlineoverridevirtual |
Reads source vector 16bit operand.
Implements ExecContext.
Definition at line 248 of file exec_context.hh.
References RegId::isVecReg(), SimpleThread::readVec16BitLaneReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Reads source vector 32bit operand.
Implements ExecContext.
Definition at line 258 of file exec_context.hh.
References RegId::isVecReg(), SimpleThread::readVec32BitLaneReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Reads source vector 64bit operand.
Implements ExecContext.
Definition at line 268 of file exec_context.hh.
References RegId::isVecReg(), SimpleThread::readVec64BitLaneReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Vector Register Lane Interfaces.
Reads source vector 8bit operand.
Implements ExecContext.
Definition at line 238 of file exec_context.hh.
References RegId::isVecReg(), SimpleThread::readVec8BitLaneReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Vector Elem Interfaces.
Reads an element of a vector register.
Implements ExecContext.
Definition at line 177 of file exec_context.hh.
References RegId::isVecElem(), SimpleThread::readVecElem(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Predicate registers interface.
Reads source predicate register operand.
Implements ExecContext.
Definition at line 185 of file exec_context.hh.
References RegId::isVecPredReg(), SimpleThread::readVecPredReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Vector Register Interfaces.
Reads source vector register operand.
Implements ExecContext.
Definition at line 161 of file exec_context.hh.
References RegId::isVecReg(), SimpleThread::readVecReg(), X86ISA::reg, and StaticInst::srcRegIdx().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 422 of file exec_context.hh.
References StaticInst::destRegIdx(), RegId::index(), RegId::isCCReg(), X86ISA::reg, SimpleThread::setCCReg(), and X86ISA::val.
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inlineoverridevirtual |
Sets the bits of a floating point register of single width to a binary value.
Implements ExecContext.
Definition at line 209 of file exec_context.hh.
References StaticInst::destRegIdx(), RegId::index(), RegId::isFloatReg(), X86ISA::reg, SimpleThread::setFloatReg(), and X86ISA::val.
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inlineoverridevirtual |
Sets an integer register to a value.
Implements ExecContext.
Definition at line 201 of file exec_context.hh.
References StaticInst::destRegIdx(), RegId::index(), RegId::isIntReg(), X86ISA::reg, SimpleThread::setIntReg(), and X86ISA::val.
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 339 of file exec_context.hh.
References SimpleThread::setMemAccPredicate().
Referenced by Minor::LSQ::LSQRequest::completeDisabledMemAccess(), and ExecContext().
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inlineoverridevirtual |
Sets a miscellaneous register, handling any architectural side effects due to writing that register.
Implements ExecContext.
Definition at line 369 of file exec_context.hh.
References SimpleThread::setMiscReg().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 383 of file exec_context.hh.
References StaticInst::destRegIdx(), RegId::index(), RegId::isMiscReg(), X86ISA::reg, SimpleThread::setMiscReg(), and X86ISA::val.
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 327 of file exec_context.hh.
References SimpleThread::setPredicate().
Referenced by ExecContext().
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Sets the number of consecutive store conditional failures.
Implements ExecContext.
Definition at line 400 of file exec_context.hh.
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inlineoverridevirtual |
Sets a vector register to a value.
Implements ExecContext.
Definition at line 312 of file exec_context.hh.
References StaticInst::destRegIdx(), RegId::isVecElem(), X86ISA::reg, and SimpleThread::setVecElem().
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inlineoverridevirtual |
Write a lane of the destination vector operand.
Implements ExecContext.
Definition at line 286 of file exec_context.hh.
References setVecLaneOperandT().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 292 of file exec_context.hh.
References setVecLaneOperandT().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 298 of file exec_context.hh.
References setVecLaneOperandT().
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inlineoverridevirtual |
Implements ExecContext.
Definition at line 304 of file exec_context.hh.
References setVecLaneOperandT().
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inline |
Write a lane of the destination vector operand.
Definition at line 279 of file exec_context.hh.
References StaticInst::destRegIdx(), RegId::isVecReg(), X86ISA::reg, and SimpleThread::setVecLane().
Referenced by setVecLaneOperand().
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inlineoverride |
Definition at line 226 of file exec_context.hh.
References StaticInst::destRegIdx(), RegId::isVecPredReg(), X86ISA::reg, and SimpleThread::setVecPredReg().
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inlineoverride |
Definition at line 217 of file exec_context.hh.
References StaticInst::destRegIdx(), RegId::isVecReg(), X86ISA::reg, and SimpleThread::setVecReg().
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Executes a syscall.
Implements ExecContext.
Definition at line 391 of file exec_context.hh.
References SimpleThread::syscall().
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inlineoverridevirtual |
Returns a pointer to the ThreadContext.
Implements ExecContext.
Definition at line 396 of file exec_context.hh.
References SimpleThread::getTC().
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inlineoverridevirtual |
For atomic-mode contexts, perform an atomic memory write operation.
For timing-mode contexts, initiate a timing memory write operation.
Implements ExecContext.
Definition at line 125 of file exec_context.hh.
References Minor::Execute::getLSQ(), and Minor::LSQ::pushRequest().
MinorCPU& Minor::ExecContext::cpu |
Definition at line 77 of file exec_context.hh.
Referenced by getCpuPtr().
Execute& Minor::ExecContext::execute |
The execute stage so we can peek at its contents.
Definition at line 83 of file exec_context.hh.
MinorDynInstPtr Minor::ExecContext::inst |
Instruction for the benefit of memory operations and for PC.
Definition at line 86 of file exec_context.hh.
SimpleThread& Minor::ExecContext::thread |
ThreadState object, provides all the architectural state.
Definition at line 80 of file exec_context.hh.