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gpu_isa.hh
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1 /*
2  * Copyright (c) 2016 Advanced Micro Devices, Inc.
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33  * Authors: Anthony Gutierrez
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35 
36 #ifndef __ARCH_HSAIL_GPU_ISA_HH__
37 #define __ARCH_HSAIL_GPU_ISA_HH__
38 
39 #include <cstdint>
40 
41 #include "arch/hsail/gpu_types.hh"
42 #include "base/logging.hh"
43 #include "base/types.hh"
44 #include "gpu-compute/misc.hh"
45 
46 namespace HsailISA
47 {
48  class GPUISA
49  {
50  public:
52  {
53  }
54 
55  void
56  writeMiscReg(int opIdx, RegVal operandVal)
57  {
58  fatal("HSAIL does not implement misc registers yet\n");
59  }
60 
61  RegVal
62  readMiscReg(int opIdx) const
63  {
64  fatal("HSAIL does not implement misc registers yet\n");
65  }
66 
67  bool hasScalarUnit() const { return false; }
68 
69  uint32_t
70  advancePC(uint32_t old_pc, GPUDynInstPtr gpuDynInst)
71  {
72  return old_pc + sizeof(RawMachInst);
73  }
74  };
75 }
76 
77 #endif // __ARCH_HSAIL_GPU_ISA_HH__
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:175
bool hasScalarUnit() const
Definition: gpu_isa.hh:67
uint64_t RegVal
Definition: types.hh:168
RegVal readMiscReg(int opIdx) const
Definition: gpu_isa.hh:62
std::shared_ptr< GPUDynInst > GPUDynInstPtr
Definition: misc.hh:48
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,16,32,64}_t.
uint32_t advancePC(uint32_t old_pc, GPUDynInstPtr gpuDynInst)
Definition: gpu_isa.hh:70
void writeMiscReg(int opIdx, RegVal operandVal)
Definition: gpu_isa.hh:56
uint32_t RawMachInst
Definition: gpu_types.hh:54

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