#include <cassert>
#include <sstream>
#include <utility>
#include "base/compiler.hh"
#include "base/cprintf.hh"

Classes
class	Logger

struct	Logger::Loc

Macros
#define	base_message(logger, ...) logger.print(::Logger::Loc(__FILE__, __LINE__), __VA_ARGS__)

#define	base_message_once(...)

#define	exit_message(logger, ...)

#define	panic(...) exit_message(::Logger::getPanic(), __VA_ARGS__)
	This implements a cprintf based panic() function. More...

#define	fatal(...) exit_message(::Logger::getFatal(), __VA_ARGS__)
	This implements a cprintf based fatal() function. More...

#define	panic_if(cond, ...)
	Conditional panic macro that checks the supplied condition and only panics if the condition is true and allows the programmer to specify diagnostic printout. More...

#define	fatal_if(cond, ...)
	Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condition is true and allows the programmer to specify diagnostic printout. More...

#define	warn(...) base_message(::Logger::getWarn(), __VA_ARGS__)

#define	inform(...) base_message(::Logger::getInfo(), __VA_ARGS__)

#define	hack(...) base_message(::Logger::getHack(), __VA_ARGS__)

#define	warn_once(...) base_message_once(::Logger::getWarn(), __VA_ARGS__)

#define	inform_once(...) base_message_once(::Logger::getInfo(), __VA_ARGS__)

#define	hack_once(...) base_message_once(::Logger::getHack(), __VA_ARGS__)

#define	warn_if(cond, ...)
	Conditional warning macro that checks the supplied condition and only prints a warning if the condition is true. More...

#define	warn_if_once(cond, ...)

#define	chatty_assert(cond, ...)
	The chatty assert macro will function like a normal assert, but will allow the specification of additional, helpful material to aid debugging why the assertion actually failed. More...

Macro Definition Documentation

◆ base_message

#define base_message	(	logger,
		...
	)	logger.print(::Logger::Loc(__FILE__, __LINE__), __VA_ARGS__)

Definition at line 136 of file logging.hh.

◆ base_message_once

#define base_message_once ( ... )

Value:

do {                     \
        static bool once = false;                       \
        if (!once) {                                    \
            base_message(__VA_ARGS__);                  \
            once = true;                                \
        }                                               \
    } while (0)

Definition at line 147 of file logging.hh.

◆ chatty_assert

#define chatty_assert	(	cond,
		...
	)

Value:

do {                                                                \
        if (!(cond))                                                    \
            panic("assert(" # cond ") failed: %s", csprintf(__VA_ARGS__)); \
    } while (0)

The chatty assert macro will function like a normal assert, but will allow the specification of additional, helpful material to aid debugging why the assertion actually failed.

Like the normal assertion, the chatty_assert will not be active in fast builds.

Parameters

cond	Condition that is checked; if false -> assert
...	Printf-based format string with arguments, extends printout.NDEBUG

Definition at line 252 of file logging.hh.

Referenced by Cache::access(), BaseCache::access(), BaseCache::handleFill(), Cache::handleSnoop(), VoltageDomain::perfLevel(), VoltageDomain::sanitiseVoltages(), MemChecker::WriteCluster::startWrite(), VoltageDomain::voltage(), and BaseCache::writebackBlk().

◆ exit_message

#define exit_message	(	logger,
		...
	)

Value:

do {                                                \
        base_message(logger, __VA_ARGS__);              \
        logger.exit_helper();                           \
    } while (0)

Definition at line 155 of file logging.hh.

◆ fatal

#define fatal ( ... ) exit_message(::Logger::getFatal(), __VA_ARGS__)

This implements a cprintf based fatal() function.

fatal() should be called when the simulation cannot continue due to some condition that is the user's fault (bad configuration, invalid arguments, etc.) and not a simulator bug. fatal() might call exit, unlike panic().

Definition at line 175 of file logging.hh.

Referenced by System::_getMasterId(), Histogram::add(), ArmISA::PMU::addEventProbe(), LabelMap::addLabel(), AddrRange::AddrRange(), CacheRecorder::aggregateRecords(), FDArray::allocFD(), System::allocPhysPages(), AlphaSystem::AlphaSystem(), ARMArchTLB::ARMArchTLB(), ArmSystem::ArmSystem(), arrayParamIn(), HsailISA::AtomicInstBase< MemDataType::OperandType, AddrOperandType, NumSrcOperands, HasDst >::AtomicInstBase(), BareMetalRiscvSystem::BareMetalRiscvSystem(), BaseCPU::BaseCPU(), BaseSetAssoc::BaseSetAssoc(), BaseSimpleCPU::BaseSimpleCPU(), BiModeBP::BiModeBP(), EtherInt::bind(), sc_gem5::ScPortWrapper< IF >::bind(), MasterPort::bind(), BOPPrefetcher::BOPPrefetcher(), BrigObject::BrigObject(), RegAddrOperand< RegOperandType >::calcUniform(), HsailISA::Call::Call(), CheckpointIn::CheckpointIn(), MipsISA::Interrupts::clear(), MipsISA::Interrupts::clearAll(), SrcClockDomain::clockPeriod(), cloneFunc(), OutputDirectory::close(), AbstractController::collateStats(), HsailISA::compare(), GPUStaticInst::completeAcc(), ComputeUnit::ComputeUnit(), ConfigCache::ConfigCache(), HsailISA::constructAtomic(), CopyEngine::CopyEngine(), CowDiskImage::CowDiskImage(), PhysicalMemory::createBackingStore(), HsaObject::createHsaObject(), OutputDirectory::createSubdirectory(), GenericISA::M5FatalFault::debugFunc(), FaultModel::declare_router(), Minor::Decode::Decode(), HsailISA::decodeAtomicHelper(), HsailISA::decodeLd(), HsailISA::decodeLd2(), HsailISA::decodeLda(), HsailISA::decodeSt(), DefaultBTB::DefaultBTB(), DefaultCommit< Impl >::DefaultCommit(), DefaultDecode< Impl >::DefaultDecode(), DefaultFetch< Impl >::DefaultFetch(), DefaultIEW< Impl >::DefaultIEW(), DefaultRename< Impl >::DefaultRename(), DerivedClockDomain::DerivedClockDomain(), ElfObject::determineArch(), ElfObject::determineOpSys(), Shader::doFunctionalAccess(), Process::doSyscall(), MinorCPU::drainResume(), DRAMCtrl::DRAMCtrl(), DramGen::DramGen(), DramRotGen::DramRotGen(), DRAMSim2Wrapper::DRAMSim2Wrapper(), Stats::dump(), Stats::enable(), AbstractController::enqueuePrefetch(), EtherTapStub::EtherTapStub(), GPUStaticInst::execAtomic(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execAtomic(), GPUStaticInst::execAtomicAcq(), GPUStaticInst::execLdAcq(), HsailISA::Call::execPseudoInst(), GPUStaticInst::execSt(), KernelLaunchStaticInst::execute(), Minor::Execute::Execute(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::execute(), HsailISA::MemFence::execute(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::execute(), HsailISA::Call::execute(), HsailISA::AtomicInst< MemDataType, AddrOperandType, NumSrcOperands, HasDst >::execute(), DRAMSim2Wrapper::extractConfig(), FALRU::FALRU(), FaultModel::fault_prob(), FaultModel::fault_vector(), Minor::Fetch1::Fetch1(), Minor::Fetch2::Fetch2(), Fiber::Fiber(), BaseXBar::findPort(), findRegDataType(), Process::fixupStackFault(), FlashDevice::FlashDevice(), FullO3CPU< O3CPUImpl >::FullO3CPU(), Network::functionalRead(), Network::functionalWrite(), GarnetSyntheticTraffic::GarnetSyntheticTraffic(), sc_core::sc_module::gem5_getPort(), HsailISA::LdInst< MemDataType, DestDataType, AddrOperandType >::generateDisassembly(), HsailISA::StInst< MemDataType, SrcDataType, AddrOperandType >::generateDisassembly(), GarnetSyntheticTraffic::generatePkt(), NetworkInterface::get_vnet(), getBrigDataTypeBytes(), DRAMPower::getDataRate(), Minor::LSQ::SpecialDataRequest::getHeadPacket(), System::getMasterName(), ExternalMaster::getPort(), ExternalSlave::getPort(), SimObject::getPort(), LdsState::getPort(), ComputeUnit::getPort(), ArmISA::TableWalker::getPort(), LdsState::getRefCounter(), HsailCode::getSize(), ArmSemihosting::getSTDIO(), Gicv2m::Gicv2m(), Minor::Execute::handleMemResponse(), sc_gem5::Kernel::init(), AddrMapper::init(), MemDelay::init(), MemCheckerMonitor::init(), CommMonitor::init(), BaseKvmCPU::init(), MinorCPU::init(), ExternalMaster::init(), ExternalSlave::init(), SMMUv3::init(), DRAMSim2::init(), BaseTrafficGen::init(), SerialLink::init(), Bridge::init(), HsailCode::init(), RegOrImmOperand< RegOperand, T >::init(), RegAddrOperand< RegOperandType >::init(), NoRegAddrOperand::init(), ListOperand::init(), FunctionRefOperand::init(), BaseCache::init(), DRAMCtrl::init(), RegOrImmOperand< RegOperand, T >::init_from_vect(), GPUStaticInst::initiateAcc(), FreebsdArmSystem::initState(), Process::initState(), X86System::initState(), LinuxArmSystem::initState(), ArmSystem::initState(), System::initState(), BaseRegOperand::initWithStrOffset(), RiscvISA::TLB::insert(), MipsISA::TLB::insert(), PowerISA::TLB::insert(), ClDriver::ioctl(), IPACache::IPACache(), AddrMapper::isSnooping(), Kvm::Kvm(), HsailISA::LdInstBase< MemDataType::CType, DestDataType::OperandType, AddrOperandType >::LdInstBase(), SymbolTable::load(), PseudoInst::loadsymbol(), LocalBP::LocalBP(), RoutingUnit::lookupRoutingTable(), X86ISA::I8259::lowerInterruptPin(), Minor::LSQ::LSQ(), sc_gem5::ScMainFiber::main(), GPUDynInst::makeAtomicOpFunctor(), GenericArmPciHost::mapPciInterrupt(), HsailISA::MemFence::MemFence(), PortProxy::memsetBlob(), MinorCPU::MinorCPU(), mkutctime(), mmapFunc(), BloomFilter::MultiBitSel::MultiBitSel(), Trace::NativeTrace::NativeTrace(), PyTrafficGen::nextGenerator(), NoMaliGpu::NoMaliGpu(), BaseTrafficGen::noProgress(), objParamIn(), Stats::Text::open(), FDArray::openFile(), paramIn(), TrafficGen::parseConfig(), sc_gem5::Scheduler::pause(), PciDevice::PciDevice(), Minor::Pipeline::Pipeline(), ArmISA::PMU::PMU(), MipsISA::Interrupts::post(), Process::Process(), AnnotateDumpCallback::process(), BrigObject::processDirectives(), DRAMCtrl::Rank::processRefreshEvent(), X86ISA::I8259::raiseInterruptPin(), RangeAddrMapper::RangeAddrMapper(), A9SCU::read(), PortProxy::readBlob(), RubySystem::readCompressedTrace(), readlinkFunc(), HsailISA::GPUISA::readMiscReg(), PowerISA::ISA::readMiscReg(), PowerISA::ISA::readMiscRegNoEffect(), PortProxy::readString(), RealViewOsc::RealViewOsc(), RubyPort::MemSlavePort::recvFunctional(), LdsState::CuSidePort::recvFunctional(), TLBCoalescer::MemSidePort::recvFunctional(), StubSlavePort::recvFunctionalSnoop(), BaseXBar::recvRangeChange(), TLBCoalescer::CpuSidePort::recvRespRetry(), TLBCoalescer::MemSidePort::recvRespRetry(), LdsState::CuSidePort::recvRetry(), StubSlavePort::recvTimingSnoopResp(), SerialDevice::regInterfaceCallback(), RealViewCtrl::registerDevice(), LdsState::releaseSpace(), OutputDirectory::remove(), reqScopeToHSAScope(), reqSegmentToHSASegment(), Stats::reset(), FDArray::restoreFileOffsets(), SBOOEPrefetcher::SBOOEPrefetcher(), Scheduler::Scheduler(), NonCachingSimpleCPU::sendPacket(), SMMUv3SlaveInterface::sendRange(), ComputeUnit::sendRequest(), RubySystem::serialize(), GpuDispatcher::serialize(), MipsISA::Interrupts::serialize(), Serializable::serializeAll(), PhysicalMemory::serializeStore(), Set::Set(), MessageBuffer::setConsumer(), OutputDirectory::setDirectory(), PowerISA::ISA::setMiscReg(), PowerISA::ISA::setMiscRegNoEffect(), GPUDynInst::setRequestFlags(), Set::setSize(), X86ISA::I8259::signalInterrupt(), SimPoint::SimPoint(), simulate(), SMMUTLB::SMMUTLB(), TAGE_SC_L_TAGE::squash(), MathExprPowerModel::startup(), AlphaBackdoor::startup(), HsailISA::StInstBase< MemDataType, SrcDataType::OperandType, AddrOperandType >::StInstBase(), StochasticGen::StochasticGen(), sc_gem5::Scheduler::stop(), StoreSet::StoreSet(), System::System(), GarnetSyntheticTraffic::tick(), X86ISA::TLB::TLB(), SparcISA::TLB::TLB(), TournamentBP::TournamentBP(), X86ISA::GpuTLB::translate(), PowerISA::TLB::translateAtomic(), UFSHostDevice::UFSHostDevice(), unimplementedFunc(), MipsISA::Interrupts::unserialize(), X86ISA::TLB::unserialize(), ArmSemihosting::File::unserialize(), BaseCache::unserialize(), PhysicalMemory::unserializeStore(), NonCachingSimpleCPU::verifyMemoryMode(), BaseKvmCPU::verifyMemoryMode(), AtomicSimpleCPU::verifyMemoryMode(), TimingSimpleCPU::verifyMemoryMode(), FullO3CPU< O3CPUImpl >::verifyMemoryMode(), MipsISA::vtophys(), ArmISA::vtophys(), PowerISA::vtophys(), RiscvISA::vtophys(), WalkCache::WalkCache(), CpuLocalTimer::Timer::watchdogAtZero(), System::workItemEnd(), PortProxy::writeBlob(), RubySystem::writeCompressedTrace(), HsailISA::GPUISA::writeMiscReg(), X86ISA::IntelMP::FloatingPointer::writeOut(), and PortProxy::writeString().

◆ fatal_if

#define fatal_if	(	cond,
		...
	)

Value:

do {                                                        \
        if ((cond)) {                                           \
            fatal("fatal condition " # cond " occurred: %s",    \
                  csprintf(__VA_ARGS__));                       \
        }                                                       \
    } while (0)

Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condition is true and allows the programmer to specify diagnostic printout.

Useful to replace if + fatal, or if + print + assert, etc.

Parameters

cond	Condition that is checked; if true -> fatal
...	Printf-based format string with arguments, extends printout.

Definition at line 203 of file logging.hh.

Referenced by Process::absolutePath(), AccessMapPatternMatching::AccessMapPatternMatching(), AddrRange::AddrRange(), ArmISA::PMU::addSoftwareIncrementEvent(), BasePrefetcher::addTLB(), AlphaProcess::AlphaProcess(), SectorTags::anyBlk(), ArmInterruptPin::ArmInterruptPin(), ArmProcess::ArmProcess(), ArmSystem::ArmSystem(), arrayParamIn(), AssociativeSet< SignaturePathPrefetcher::SignatureEntry >::AssociativeSet(), BaseCacheCompressor::BaseCacheCompressor(), BaseCPU::BaseCPU(), BaseGic::BaseGic(), BaseIndexingPolicy::BaseIndexingPolicy(), sc_gem5::TlmInitiatorBaseWrapper< BITWIDTH >::bind(), IntSinkPinBase::bind(), IntSourcePinBase::bind(), sc_gem5::ScInterfaceWrapper< IF >::bind(), sc_gem5::ScExportWrapper< IF >::bind(), BloomFilter::Block::Block(), BrigObject::BrigObject(), BRRIPRP::BRRIPRP(), BloomFilter::Bulk::Bulk(), FALRU::CacheTracking::CacheTracking(), Network::checkNetworkAllocation(), BaseCacheCompressor::compress(), ComputeUnit::ComputeUnit(), LdsState::countBankConflicts(), CustomNoMaliGpu::CustomNoMaliGpu(), LdsState::decreaseRefCounter(), DVFSHandler::domainID(), DRAMCtrl::DRAMCtrl(), DVFSHandler::DVFSHandler(), ElasticTrace::ElasticTrace(), EnergyCtrl::EnergyCtrl(), FixedStreamGen::FixedStreamGen(), GenericTimer::GenericTimer(), GicV2::getCpuTarget(), LdsState::getRefCounter(), Gicv2m::Gicv2m(), BloomFilter::H3::H3(), PS2Device::hostRegDataAvailable(), X86ISA::I8042::I8042(), ImageFileData::ImageFileData(), LdsState::increaseRefCounter(), IndirectMemoryPrefetcher::IndirectMemoryPrefetcher(), VecRegisterState::init(), ComputeUnit::init(), ArmISA::TableWalker::init(), QoS::PropFairPolicy::initMaster(), BaseSetAssoc::invalidate(), GPUCoalescer::issueRequest(), BaseKvmCPU::kvmRun(), LdsState::LdsState(), System::lookupMasterId(), GenericArmPciHost::mapPciInterrupt(), MemFootprintProbe::MemFootprintProbe(), MemTest::MemTest(), SimplePoolManager::minAllocatedElements(), MipsProcess::MipsProcess(), MmioVirtIO::MmioVirtIO(), MultiCompressor::MultiCompressor(), MultiperspectivePerceptron::MultiperspectivePerceptron(), MultiperspectivePerceptronTAGE::MultiperspectivePerceptronTAGE(), PciDevice::PciDevice(), PowerProcess::PowerProcess(), QoS::PropFairPolicy::PropFairPolicy(), LdsChunk::read(), ArmSemihosting::readString(), ComputeUnit::LDSPort::recvReqRetry(), ComputeUnit::LDSPort::recvTimingResp(), PciHost::registerDevice(), System::registerThreadContext(), LdsState::releaseSpace(), LdsState::reserveSpace(), RiscvProcess::RiscvProcess(), SatCounter::SatCounter(), SectorTags::SectorTags(), SlavePort::sendRangeChange(), ComputeUnit::LDSPort::sendTimingReq(), WaitClass::set(), setInterpDir(), LdsState::setParent(), SnoopFilter::setSlavePorts(), ArmISA::TLB::setTestInterface(), BaseSetAssoc::setWayAllocationMax(), SignaturePathPrefetcher::SignaturePathPrefetcher(), SimpleIndirectPredictor::SimpleIndirectPredictor(), SkewedAssociative::SkewedAssociative(), SMMUv3::SMMUv3(), SparcProcess::SparcProcess(), SrcClockDomain::SrcClockDomain(), StackDistProbe::StackDistProbe(), VirtIO9PDiod::startDiod(), STeMSPrefetcher::STeMSPrefetcher(), StreamGen::StreamGen(), System::System(), SystemCounter::SystemCounter(), to_number(), TraceCPU::TraceCPU(), TreePLRURP::TreePLRURP(), MultiLevelPageTable< EntryTypes >::unmap(), EtherLink::Link::unserialize(), VectorRegisterFile::VectorRegisterFile(), VoltageDomain::VoltageDomain(), and LdsChunk::write().

◆ hack

#define hack ( ... ) base_message(::Logger::getHack(), __VA_ARGS__)

Definition at line 214 of file logging.hh.

Referenced by GenericISA::M5HackFaultBase< Base >::debugFunc(), KvmVM::delayedStartup(), ArmKvmCPU::updateKvmStateCoProc(), and X86KvmCPU::updateKvmStateSRegs().

◆ hack_once

#define hack_once ( ... ) base_message_once(::Logger::getHack(), __VA_ARGS__)

Definition at line 218 of file logging.hh.

Referenced by X86ISA::Interrupts::setReg(), BaseKvmCPU::totalOps(), and ArmKvmCPU::updateTCStateCoProc().

◆ inform

#define inform ( ... ) base_message(::Logger::getInfo(), __VA_ARGS__)

Definition at line 213 of file logging.hh.

Referenced by VncServer::accept(), ArmSemihosting::ArmSemihosting(), TraceCPU::checkAndSchedExitEvent(), GenericISA::M5InformFaultBase< Base >::debugFunc(), VncServer::detach(), SparcISA::TLB::doMmuRegWrite(), ArmV8KvmCPU::dump(), BaseKvmCPU::dump(), X86KvmCPU::dumpDebugRegs(), dumpFpuCommon(), dumpFpuSpec(), dumpKvm(), ArmKvmCPU::dumpKvmStateCoProc(), ArmKvmCPU::dumpKvmStateCore(), ArmKvmCPU::dumpKvmStateMisc(), ArmKvmCPU::dumpKvmStateVFP(), HDLcd::PixelPump::dumpSettings(), HDLcd::DmaEngine::dumpSettings(), X86KvmCPU::dumpXCRs(), X86KvmCPU::dumpXSave(), TCPIface::establishConnection(), Process::fixupStackFault(), TraceCPU::init(), DistIface::Sync::init(), FreebsdArmSystem::initState(), LinuxArmSystem::initState(), ArmSystem::initState(), ArmISA::mcrMrc14TrapToHyp(), CowDiskImage::notifyFork(), Linux::DmesgDumpEvent::process(), Linux::KernelPanicEvent::process(), DistIface::SyncEvent::process(), ArmSemihosting::readString(), DistIface::readyToCkpt(), DistIface::readyToExit(), TCPIface::recvTCP(), ElasticTrace::regEtraceListeners(), System::registerThreadContext(), ElasticTrace::regProbeListeners(), UFSHostDevice::requestHandler(), UFSHostDevice::UFSSCSIDevice::SCSICMDHandle(), SMMUv3SlaveInterface::sendRange(), simulate(), DistIface::SyncEvent::start(), VirtIO9PDiod::startDiod(), BaseKvmCPU::startup(), System::System(), UFSHostDevice::taskHandler(), TCPIface::TCPIface(), VirtIO9PDiod::terminateDiod(), DistIface::toggleSync(), TournamentBP::TournamentBP(), TraceCPU::updateNumOps(), AlphaBackdoor::write(), and MC146818::writeData().

◆ inform_once

#define inform_once ( ... ) base_message_once(::Logger::getInfo(), __VA_ARGS__)

Definition at line 217 of file logging.hh.

◆ panic

#define panic ( ... ) exit_message(::Logger::getPanic(), __VA_ARGS__)

This implements a cprintf based panic() function.

panic() should be called when something happens that should never ever happen regardless of what the user does (i.e., an acutal m5 bug). panic() might call abort which can dump core or enter the debugger.

Definition at line 167 of file logging.hh.

◆ panic_if

#define panic_if	(	cond,
		...
	)

Value:

do {                                                     \
        if ((cond)) {                                        \
            panic("panic condition " # cond " occurred: %s", \
                  csprintf(__VA_ARGS__));                    \
        }                                                    \
    } while (0)

Conditional panic macro that checks the supplied condition and only panics if the condition is true and allows the programmer to specify diagnostic printout.

Useful to replace if + panic, or if + print + assert, etc.

Parameters

cond	Condition that is checked; if true -> panic
...	Printf-based format string with arguments, extends printout.

Definition at line 185 of file logging.hh.

Referenced by OFSchedulingPolicy::__chooseWave(), RRSchedulingPolicy::__chooseWave(), MipsISA::RemoteGDB::acc(), PowerISA::RemoteGDB::acc(), RiscvISA::RemoteGDB::acc(), AbstractMemory::access(), SimpleCache::accessTiming(), ArmISA::PMU::RegularEvent::addMicroarchitectureProbe(), UnifiedFreeList::addRegs(), QueuedPrefetcher::addToQueue(), WriteQueueEntry::allocate(), InstResult::asPred(), InstResult::asVector(), InstResult::asVectorElem(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::b_transport(), Iris::BaseCPU::BaseCPU(), sc_gem5::Module::bindPorts(), BaseXBar::calcPacketTiming(), DistIface::RecvScheduler::calcReceiveTick(), StackDistCalc::calcStackDist(), StackDistCalc::calcStackDistAndUpdate(), NetworkInterface::calculateVC(), ChannelAddrRange::ChannelAddrRange(), FALRU::CacheTracking::check(), RealViewOsc::clockPeriod(), ArmSemihosting::File::close(), TCPIface::connect(), BaseRemoteGDB::connect(), Checker< O3CPUImpl >::copyResult(), FastModel::CortexA76Cluster::CortexA76Cluster(), LdsState::countBankConflicts(), PhysicalMemory::createBackingStore(), Fiber::createContext(), Gicv3Distributor::deassertSPI(), DefaultFetch< Impl >::DefaultFetch(), Iris::ThreadContext::delBp(), sc_gem5::Scheduler::deschedule(), Drainable::dmDrainResume(), DtbFile::DtbFile(), ArmISA::ELIs32(), ArmISA::ELUsingAArch32K(), QoS::MemCtrl::escalateQueues(), MathExprPowerModel::eval(), VectorRegisterFile::exec(), DVFSHandler::findDomain(), NoncoherentCache::functionalAccess(), GuestABI::Argument< X86PseudoInstABI, uint64_t >::get(), ArmPPIGen::get(), ImmOperand< SrcCType >::get(), DmaReadFifo::get(), FastModel::CortexA76TC::getBpSpaceId(), Iris::ThreadContext::getCurrentInstCount(), ArmISA::ISA::getCurSveVecLenInBits(), ArmISA::AbortFault< DataAbort >::getFaultStatusCode(), ArmISA::ISA::getGICv3CPUInterface(), Gicv3Distributor::getIntGroup(), Iris::ThreadContext::getOrAllocBp(), MultiPrefetcher::getPacket(), EtherSwitch::getPort(), SimpleMemobj::getPort(), SimpleCache::getPort(), Gicv3::getRedistributorByAddr(), PhysRegFile::getRegElemIds(), PhysRegFile::getTrueId(), Gicv3Distributor::Gicv3Distributor(), SimpleCache::handleResponse(), Cache::handleSnoop(), MSHR::handleSnoop(), hasGzipMagic(), HelloObject::HelloObject(), X86ISA::I8259::I8259(), ImageFileData::ImageFileData(), X86ISA::I82094AA::init(), Gicv3::init(), X86ISA::Interrupts::init(), SectorSubBlk::insert(), Gicv3Distributor::intStatus(), AlphaISA::NDtbMissFault::invoke(), SparcISA::FastInstructionAccessMMUMiss::invoke(), SparcISA::FastDataAccessMMUMiss::invoke(), AlphaISA::ItbPageFault::invoke(), TCPIface::listen(), QoS::MemCtrl::logResponse(), SnoopFilter::lookupRequest(), SnoopFilter::lookupSnoop(), EmulationPageTable::map(), MathExpr::MathExpr(), sc_gem5::Module::Module(), ArmSemihosting::File::openImpl(), Gicv3Its::pageAddress(), QoS::Policy::pair(), CircleBuf< char >::peek(), sc_gem5::Module::pop(), BaseRemoteGDB::port(), PowerModel::PowerModel(), DrainManager::preCheckpointRestore(), DistIface::SyncEvent::process(), QoS::MemSinkCtrl::processNextReqEvent(), ArmISA::TableWalker::processWalkAArch64(), DistIface::RecvScheduler::pushPacket(), MmioVirtIO::read(), Sp805::read(), HDLcd::read(), Gicv3::read(), ArmSemihosting::File::read(), GicV2::readCpu(), ArmSemihosting::readString(), X86ISA::IntSlavePort< X86ISA::Interrupts >::recvAtomic(), NoncoherentCache::recvAtomic(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvAtomic(), SimpleMemory::recvAtomic(), Bridge::BridgeSlavePort::recvAtomic(), QoS::MemSinkCtrl::recvAtomic(), DRAMCtrl::recvAtomic(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvAtomicBackdoor(), TCPIface::recvPacket(), NoncoherentCache::recvTimingReq(), sc_gem5::Gem5ToTlmBridge< BITWIDTH >::recvTimingReq(), SimpleMemory::recvTimingReq(), Bridge::BridgeSlavePort::recvTimingReq(), QoS::MemSinkCtrl::recvTimingReq(), CoherentXBar::recvTimingReq(), DRAMCtrl::recvTimingReq(), BaseTrafficGen::recvTimingResp(), MemCheckerMonitor::recvTimingResp(), BaseCache::recvTimingResp(), LSQ< Impl >::recvTimingResp(), RegId::RegId(), ArmISA::PMU::regProbeListeners(), DrainManager::resume(), Fiber::run(), StackDistCalc::sanityCheckTree(), ArmSemihosting::File::seek(), MemoryImage::Segment::Segment(), QoS::LrgQueuePolicy::selectPacket(), sc_gem5::TlmToGem5Bridge< BITWIDTH >::sendEndReq(), FastModel::ScxEvsCortexA76< Types >::sendFunc(), Gicv3::sendInt(), Gicv3Distributor::sendInt(), GicV2::sendInt(), SimpleMemobj::CPUSidePort::sendPacket(), SimpleCache::CPUSidePort::sendPacket(), SimpleMemobj::MemSidePort::sendPacket(), SimpleCache::MemSidePort::sendPacket(), Gicv3::sendPPInt(), TCPIface::sendTCP(), ArmSemihosting::File::serialize(), Cache::serviceMSHRTargets(), Iris::ThreadContext::setCCRegFlat(), setClockFrequency(), IdeDisk::setController(), Stats::InfoAccess::setInfo(), Iris::ThreadContext::setIntRegFlat(), KvmVM::setSystem(), X86ISA::SegDescriptorLimit::setter(), ArmInterruptPin::setThreadContext(), SkewedAssociative::SkewedAssociative(), Fiber::start(), UnifiedRenameMap::switchFreeList(), ArmInterruptPin::targetContext(), Trace::TarmacTracer::TarmacTracer(), MemTest::tick(), Trace::InstPBTrace::traceMem(), FastModel::CortexA76TC::translateAddress(), Iris::TLB::translateFunctional(), DrainManager::tryDrain(), DistIface::unserialize(), SnoopFilter::updateResponse(), SnoopFilter::updateSnoopResponse(), StackDistCalc::updateSum(), BasePixelPump::updateTimings(), Checker< O3CPUImpl >::validateExecution(), MmioVirtIO::write(), Sp805::write(), HDLcd::write(), Gicv3::write(), Pl050::write(), X86ISA::I8042::write(), Fifo< uint8_t >::write(), ArmSemihosting::File::write(), GenericPciHost::write(), and Fiber::~Fiber().

◆ warn

#define warn ( ... ) base_message(::Logger::getWarn(), __VA_ARGS__)

Definition at line 212 of file logging.hh.

Referenced by __get_hostname(), MemChecker::WriteCluster::abortWrite(), ListenSocket::accept(), TCPIface::accept(), VncServer::accept(), DtbFile::addBootCmdLine(), Trace::TarmacParserRecord::advanceTrace(), System::allocPhysPages(), ArmSystem::ArmSystem(), ArmSemihosting::call32(), ArmSemihosting::call64(), VncServer::checkProtocolVersion(), VncServer::checkSecurity(), checkSeg(), TsunamiCChip::clearIPI(), DVFSHandler::clkPeriodAtPerfLevel(), Iris::BaseCPU::clockPeriodUpdated(), MemChecker::ByteTracker::completeRead(), MemTest::completeRequest(), MemChecker::WriteCluster::completeWrite(), TCPIface::connect(), HDLcd::createDmaEngine(), createImgWriter(), KvmVM::createIRQChip(), GenericTimerMem::ctrlRead(), GenericTimerMem::ctrlWrite(), VncServer::data(), ArmISA::PMU::CounterState::debugCounter(), GenericISA::M5WarnFaultBase< Base >::debugFunc(), ArmKvmCPU::decodeCoProcReg(), ArmISA::decodeCP14Reg(), PerfKvmCounter::detach(), ElfObject::determineArch(), NSGigE::devIntrPost(), sc_core::sc_mempool::display_statistics(), DistEtherLink::DistEtherLink(), Pl111::dmaDone(), X86ISA::doCpuid(), doGzipLoad(), BaseKvmCPU::doMMIOAccess(), DRAMCtrl::DRAMCtrl(), CheckerCPU::dumpAndExit(), dumpDmesgEntry(), WarnUnimplemented::execute(), Minor::Execute::Execute(), TraceGen::exit(), faccessatFunc(), FaultModel::fault_prob(), FaultModel::fault_vector(), fcntl64Func(), fcntlFunc(), DefaultFetch< Impl >::finishTranslation(), ArmISA::ISA::flattenMiscIndex(), Sparc32Process::flushWindows(), Sparc64Process::flushWindows(), fstatat64Func(), RubySystem::functionalRead(), futexFunc(), Iob::generateIpi(), ArmISA::PMU::getEvent(), X86KvmCPU::getMsrIntersection(), getrlimitFunc(), getrusageFunc(), PowerModel::getStaticPower(), MathExprPowerModel::getStatValue(), MipsISA::haltThread(), MC146818::handleEvent(), BaseKvmCPU::handleKvmExitIRQWindowOpen(), MipsISA::handleLockedWrite(), AlphaISA::handleLockedWrite(), RiscvISA::handleLockedWrite(), ArmISA::handleLockedWrite(), SparcProcess::handleTrap(), Gicv3CPUInterface::haveEL(), ArmSystem::haveEL(), CPA::hwWe(), ignoreFunc(), ignoreWarnOnceFunc(), BaseRemoteGDB::incomingData(), HsailCode::init(), CoherentXBar::init(), initSignals(), BareMetalRiscvSystem::initState(), FreebsdArmSystem::initState(), LinuxArmSystem::initState(), Minor::LSQ::StoreBuffer::insert(), RiscvISA::TLB::insertAt(), MipsISA::TLB::insertAt(), PowerISA::TLB::insertAt(), ioctlFunc(), Ps2::keySymToPs2(), EcoffObject::loadGlobalSymbols(), EcoffObject::loadLocalSymbols(), MaltaCChip::MaltaCChip(), mmapFunc(), mremapFunc(), BaseKvmCPU::notifyFork(), KvmVM::notifyFork(), VirtIOBlock::RequestQueue::onNotifyDescriptor(), openatFunc(), ArmSemihosting::File::openImpl(), OperatingSystem::openSpecialFile(), Linux::openSpecialFile(), optParamIn(), AddrOperandBase::parseAddr(), TrafficGen::parseConfig(), DVFSHandler::perfLevel(), PhysRegFile::PhysRegFile(), power(), prlimitFunc(), Linux::DmesgDumpEvent::process(), AnnotateDumpCallback::process(), SMMUv3::processCommand(), BrigObject::processDirectives(), PseudoInst::pseudoInst(), EtherSwitch::Interface::PortFifo::push(), Minor::Queue< Minor::ForwardInstData, ReportTraitsAdaptor< Minor::ForwardInstData >, BubbleTraitsAdaptor< Minor::ForwardInstData > >::push(), ClockedObject::pwrState(), HDLcd::pxlFrameDone(), DistIface::rankParam(), Sp805::read(), Pl011::read(), IsaFake::read(), MmioVirtIO::read(), Pl050::read(), VirtIOBlock::read(), RealViewCtrl::read(), RealViewTemperatureSensor::read(), Gicv3Distributor::read(), SMMUv3::readControl(), readlinkatFunc(), CheckerCPU::readMem(), RiscvISA::ISA::readMiscReg(), ArmISA::DummyISADevice::readMiscReg(), GenericTimer::readMiscReg(), ArmISA::ISA::readMiscReg(), ArmISA::PMU::readMiscRegInt(), X86ISA::I82094AA::readReg(), ArmSemihosting::readString(), CacheMemory::recordRequestType(), PS2Mouse::recv(), SlavePort::recvAtomicBackdoor(), MemCheckerMonitor::recvTimingResp(), Cache::recvTimingSnoopReq(), renameatFunc(), BasePixelPump::renderPixels(), TsunamiCChip::reqIPI(), DistIface::SyncNode::requestCkpt(), DistIface::SyncNode::requestExit(), X86ISA::I8259::requestInterrupt(), Minor::Queue< Minor::ForwardInstData, ReportTraitsAdaptor< Minor::ForwardInstData >, BubbleTraitsAdaptor< Minor::ForwardInstData > >::reserve(), FDArray::restoreFileOffsets(), MipsISA::restoreThread(), Process::revokeThreadContext(), schedBreak(), Sp805::sendInt(), Process::serialize(), VirtIO9PProxy::serialize(), BaseTrafficGen::serialize(), BaseCache::serialize(), Trace::setDebugLogger(), VncServer::setEncodings(), RiscvISA::ISA::setMiscReg(), ArmISA::DummyISADevice::setMiscReg(), ArmISA::PMU::setMiscReg(), GenericTimer::setMiscReg(), ArmISA::ISA::setMiscReg(), VncServer::setPixelFormat(), X86ISA::Interrupts::setReg(), X86ISA::RemoteGDB::X86GdbRegCache::setRegs(), X86ISA::RemoteGDB::AMD64GdbRegCache::setRegs(), DistIface::sizeParam(), DefaultRename< Impl >::skidInsert(), SMMUv3::SMMUv3(), sc_gem5::spawnWork(), VoltageDomain::startup(), EnergyCtrl::startup(), ItsCommand::sync(), VirtIO9PDiod::terminateDiod(), GenericTimerMem::timerRead(), GenericTimerMem::timerWrite(), PowerISA::TlbEntry::TlbEntry(), RiscvISA::TlbEntry::TlbEntry(), MipsISA::TlbEntry::TlbEntry(), AlphaISA::TlbEntry::TlbEntry(), ArmISA::TlbEntry::TlbEntry(), Iris::ThreadContext::translateAddress(), BaseRemoteGDB::trap(), Packet::trySatisfyFunctional(), UFSHostDevice::UFSHostDevice(), unlinkatFunc(), Process::unserialize(), Globals::unserialize(), EtherLink::Link::unserialize(), DVFSHandler::unserialize(), VirtIO9PProxy::unserialize(), GenericTimer::unserialize(), BaseTrafficGen::unserialize(), BaseTrafficGen::update(), ArmISA::PMU::updateCounter(), ArmKvmCPU::updateKvmStateCoProc(), ArmKvmCPU::updateKvmStateMisc(), ArmKvmCPU::updateKvmStateVFP(), ArmKvmCPU::updateTCStateCoProc(), ArmKvmCPU::updateTCStateMisc(), ArmKvmCPU::updateTCStateVFP(), Checker< O3CPUImpl >::validateExecution(), Checker< O3CPUImpl >::validateInst(), DVFSHandler::validDomainID(), Checker< O3CPUImpl >::verify(), DVFSHandler::voltageAtPerfLevel(), PseudoInst::wakeCPU(), warnUnsupportedOS(), PciVirtIO::write(), Sp805::write(), Pl011::write(), X86ISA::Speaker::write(), PngWriter::write(), A9SCU::write(), IsaFake::write(), MmioVirtIO::write(), Pl050::write(), X86ISA::I8042::write(), VirtIOBlock::write(), RealViewCtrl::write(), Gicv3Distributor::write(), IGbE::write(), PciDevice::writeConfig(), SMMUv3::writeControl(), GicV2::writeCpu(), GicV2::writeDistributor(), CheckerCPU::writeMem(), writeOutString(), X86ISA::I82094AA::writeReg(), X86KvmCPU::X86KvmCPU(), and MipsISA::yieldThread().

◆ warn_if

#define warn_if	(	cond,
		...
	)

Value:

do { \
        if ((cond)) \
            warn(__VA_ARGS__); \
    } while (0)

Conditional warning macro that checks the supplied condition and only prints a warning if the condition is true.

Useful to replace if + warn.

Parameters

cond	Condition that is checked; if true -> warn
...	Printf-based format string with arguments, extends printout.

Definition at line 228 of file logging.hh.

Referenced by ArmSystem::ArmSystem(), Iris::BaseCPU::clockPeriodUpdated(), ElfObject::ElfObject(), exitSimLoop(), PowerModel::getDynamicPower(), BaseArmKvmCPU::kvmRun(), ArmISA::TableWalker::memAttrsAArch64(), ArmISA::PMU::PMU(), ArmSemihosting::readString(), PS2TouchKit::recvTouchKit(), and DrainManager::resume().

◆ warn_if_once

#define warn_if_once	(	cond,
		...
	)

Value:

do { \
        if ((cond)) \
            warn_once(__VA_ARGS__); \
    } while (0)

Definition at line 234 of file logging.hh.

◆ warn_once

#define warn_once ( ... ) base_message_once(::Logger::getWarn(), __VA_ARGS__)

Definition at line 216 of file logging.hh.

Referenced by CacheMemory::allocate(), Pc::clearConsoleInt(), T1000::clearConsoleInt(), RealView::clearConsoleInt(), ArmISA::PMU::clearInterrupt(), Pc::clearPciInt(), ArmISA::ArmStaticInst::cpsrWriteByInstr(), Intel8254Timer::Counter::currentCount(), ArmKvmCPU::decodeVFPCtrlReg(), MiscRegImplDefined64::execute(), FaultModel::fault_prob(), FaultModel::fault_vector(), Linux::ThreadInfo::get_data(), Sequencer::hitCallback(), BaseCache::invalidateVisitor(), KvmVM::ioctl(), Terminal::listen(), BaseRemoteGDB::listen(), VncServer::listen(), LinuxArmSystem::mapPid(), RubySystem::memWriteback(), T1000::postConsoleInt(), RealView::postConsoleInt(), DistIface::SyncEvent::process(), ArmISA::TableWalker::processWalkAArch64(), ClockedObject::pwrState(), ArmISA::PMU::raiseInterrupt(), A9SCU::read(), EnergyCtrl::read(), PciDevice::readConfig(), VGic::readCtrl(), readlinkFunc(), ArmISA::ISA::readMiscReg(), ArmISA::readMPIDR(), RubyPort::MemSlavePort::recvTimingReq(), AlphaISA::RemoteGDB::RemoteGDB(), ArmISA::PMU::setCounterTypeRegister(), ArmISA::PMU::setCounterValue(), SystemCounter::setFreq(), ArmISA::ISA::setMiscReg(), SkewedAssociative::SkewedAssociative(), System::System(), X86ISA::TLB::translate(), X86ISA::GpuTLB::translate(), NSGigE::txKick(), X86KvmCPU::updateKvmStateFPULegacy(), X86KvmCPU::updateKvmStateFPUXSave(), ArmKvmCPU::updateTCStateCoProc(), Stats::Hdf5::visit(), MmioVirtIO::write(), EnergyCtrl::write(), A9GlobalTimer::write(), RealViewCtrl::write(), Pl111::write(), PciDevice::writeConfig(), and VGic::writeCtrl().

Classes

Macros

Macro Definition Documentation

◆ base_message

◆ base_message_once

◆ chatty_assert

◆ exit_message

◆ fatal

◆ fatal_if

◆ hack

◆ hack_once

◆ inform

◆ inform_once

◆ panic

◆ panic_if

◆ warn

◆ warn_if

◆ warn_if_once

◆ warn_once