gem5  v19.0.0.0
All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Modules Pages
scoreboard.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2013-2014, 2016-2017 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  * Authors: Andrew Bardsley
38  */
39 
46 #ifndef __CPU_MINOR_SCOREBOARD_HH__
47 #define __CPU_MINOR_SCOREBOARD_HH__
48 
49 #include "cpu/minor/cpu.hh"
50 #include "cpu/minor/dyn_inst.hh"
51 #include "cpu/minor/trace.hh"
52 
53 namespace Minor
54 {
55 
59 class Scoreboard : public Named
60 {
61  public:
68  const unsigned numRegs;
69 
71  typedef unsigned short int Index;
72 
76 
79 
82 
88 
92 
93  public:
94  Scoreboard(const std::string &name) :
95  Named(name),
96  numRegs(TheISA::NumIntRegs + TheISA::NumCCRegs +
100  numResults(numRegs, 0),
101  numUnpredictableResults(numRegs, 0),
102  fuIndices(numRegs, 0),
103  returnCycle(numRegs, Cycles(0)),
104  writingInst(numRegs, 0)
105  { }
106 
107  public:
111  bool findIndex(const RegId& reg, Index &scoreboard_index);
112 
117  void markupInstDests(MinorDynInstPtr inst, Cycles retire_time,
118  ThreadContext *thread_context, bool mark_unpredictable);
119 
122  void clearInstDests(MinorDynInstPtr inst, bool clear_unpredictable);
123 
129  ThreadContext *thread_context);
130 
133  bool canInstIssue(MinorDynInstPtr inst,
134  const std::vector<Cycles> *src_reg_relative_latencies,
135  const std::vector<bool> *cant_forward_from_fu_indices,
136  Cycles now, ThreadContext *thread_context);
137 
139  void minorTrace() const;
140 };
141 
142 }
143 
144 #endif /* __CPU_MINOR_SCOREBOARD_HH__ */
std::vector< Index > numUnpredictableResults
Count of the number of results which can&#39;t be predicted.
Definition: scoreboard.hh:78
Bitfield< 5, 3 > reg
Definition: types.hh:89
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:83
unsigned short int Index
Type to use when indexing numResults.
Definition: scoreboard.hh:71
const int NumFloatRegs
Definition: registers.hh:94
Minor contains all the definitions within the MinorCPU apart from the CPU class itself.
Definition: activity.cc:46
const int NumVecPredRegs
Definition: registers.hh:97
ThreadContext is the external interface to all thread state for anything outside of the CPU...
This file contains miscellaneous classes and functions for formatting general trace information and a...
Definition: trace.hh:151
std::vector< int > fuIndices
Index of the FU generating this result.
Definition: scoreboard.hh:81
std::vector< InstSeqNum > writingInst
The execute sequence number of the most recent inst to generate this register value.
Definition: scoreboard.hh:91
void clearInstDests(MinorDynInstPtr inst, bool clear_unpredictable)
Clear down the dependencies for this instruction.
Definition: scoreboard.cc:183
const int NumCCRegs
Definition: registers.hh:99
void markupInstDests(MinorDynInstPtr inst, Cycles retire_time, ThreadContext *thread_context, bool mark_unpredictable)
Mark up an instruction&#39;s effects by incrementing numResults counts.
Definition: scoreboard.cc:110
Scoreboard(const std::string &name)
Definition: scoreboard.hh:94
void minorTrace() const
MinorTraceIF interface.
Definition: scoreboard.cc:290
uint64_t InstSeqNum
Definition: inst_seq.hh:40
bool canInstIssue(MinorDynInstPtr inst, const std::vector< Cycles > *src_reg_relative_latencies, const std::vector< bool > *cant_forward_from_fu_indices, Cycles now, ThreadContext *thread_context)
Can this instruction be issued.
Definition: scoreboard.cc:218
InstSeqNum execSeqNumToWaitFor(MinorDynInstPtr inst, ThreadContext *thread_context)
Returns the exec sequence number of the most recent inst on which the given inst depends.
Definition: scoreboard.cc:154
const std::string & name() const
Definition: trace.hh:160
std::vector< Index > numResults
Count of the number of in-flight instructions that have results for each register.
Definition: scoreboard.hh:75
A scoreboard of register dependencies including, for each register: The number of in-flight instructi...
Definition: scoreboard.hh:59
Top level definition of the Minor in-order CPU model.
The dynamic instruction and instruction/line id (sequence numbers) definition for Minor...
Register ID: describe an architectural register with its class and index.
Definition: reg_class.hh:79
constexpr unsigned NumVecElemPerVecReg
Definition: registers.hh:54
bool findIndex(const RegId &reg, Index &scoreboard_index)
Sets scoreboard_index to the index into numResults of the given register index.
Definition: scoreboard.cc:51
std::vector< Cycles > returnCycle
The estimated cycle number that the result will be presented.
Definition: scoreboard.hh:87
const unsigned numRegs
The number of registers in the Scoreboard.
Definition: scoreboard.hh:68
const int NumVecRegs
Definition: registers.hh:95
const int NumIntRegs
Definition: registers.hh:93

Generated on Fri Feb 28 2020 16:26:59 for gem5 by doxygen 1.8.13