gem5  v21.1.0.2
static_inst.hh
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29 
30 #ifndef __ARCH_SPARC_INSTS_STATIC_INST_HH__
31 #define __ARCH_SPARC_INSTS_STATIC_INST_HH__
32 
33 #include <cstdint>
34 
35 #include "arch/sparc/types.hh"
36 #include "base/trace.hh"
37 #include "cpu/exec_context.hh"
38 #include "cpu/static_inst.hh"
39 
40 namespace gem5
41 {
42 
43 namespace SparcISA
44 {
45 
47 {
48  Always=0x8,
49  Never=0x0,
50  NotEqual=0x9,
51  Equal=0x1,
52  Greater=0xA,
55  Less=0x3,
59  CarrySet=0x5,
60  Positive=0xE,
61  Negative=0x6,
64 };
65 
66 extern const char *CondTestAbbrev[];
67 
69 {
70  FAlways=0x8,
71  FNever=0x0,
73  FGreater=0x6,
75  FLess=0x4,
78  FNotEqual=0x1,
79  FEqual=0x9,
86 };
87 
92 {
93  protected:
95 
96  SparcStaticInst(const char *_mnemonic, ExtMachInst _machInst,
97  OpClass __opClass) :
98  StaticInst(_mnemonic, __opClass), machInst(_machInst)
99  {}
100 
101  std::string generateDisassembly(
102  Addr pc, const loader::SymbolTable *symtab) const override;
103 
104  static void printMnemonic(std::ostream &os, const char *mnemonic);
105  static void printReg(std::ostream &os, RegId reg);
106 
107  void printSrcReg(std::ostream &os, int reg) const;
108  void printDestReg(std::ostream &os, int reg) const;
109 
110  void printRegArray(std::ostream &os,
111  const RegId *indexArray, int num) const;
112 
113  void advancePC(PCState &pcState) const override;
114 
115  static bool passesFpCondition(uint32_t fcc, uint32_t condition);
116  static bool passesCondition(uint32_t codes, uint32_t condition);
117 
118  size_t
119  asBytes(void *buf, size_t size) override
120  {
121  return simpleAsBytes(buf, size, machInst);
122  }
123 
124  PCState
125  buildRetPC(const PCState &curPC, const PCState &callPC) const override
126  {
127  PCState ret = callPC;
128  ret.uEnd();
129  ret.pc(curPC.npc());
130  return ret;
131  }
132 };
133 
134 } // namespace SparcISA
135 } // namespace gem5
136 
137 #endif //__ARCH_SPARC_INSTS_STATIC_INST_HH__
gem5::SparcISA::FGreaterOrEqual
@ FGreaterOrEqual
Definition: static_inst.hh:81
gem5::SparcISA::OverflowSet
@ OverflowSet
Definition: static_inst.hh:63
gem5::SparcISA::FUnorderedOrGreater
@ FUnorderedOrGreater
Definition: static_inst.hh:74
gem5::SparcISA::Less
@ Less
Definition: static_inst.hh:55
gem5::SparcISA::SparcStaticInst
Base class for all SPARC static instructions.
Definition: static_inst.hh:91
gem5::SparcISA::FUnorderedOrLessOrEqual
@ FUnorderedOrLessOrEqual
Definition: static_inst.hh:84
gem5::SparcISA::Never
@ Never
Definition: static_inst.hh:49
gem5::GenericISA::SimplePCState::npc
Addr npc() const
Definition: types.hh:154
gem5::SparcISA::FUnorderedOrLess
@ FUnorderedOrLess
Definition: static_inst.hh:76
gem5::SparcISA::CarryClear
@ CarryClear
Definition: static_inst.hh:58
gem5::SparcISA::FAlways
@ FAlways
Definition: static_inst.hh:70
gem5::SparcISA::ExtMachInst
uint64_t ExtMachInst
Definition: types.hh:42
gem5::SparcISA::SparcStaticInst::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: static_inst.cc:256
gem5::SparcISA::CarrySet
@ CarrySet
Definition: static_inst.hh:59
gem5::SparcISA::NotEqual
@ NotEqual
Definition: static_inst.hh:50
gem5::SparcISA::SparcStaticInst::printSrcReg
void printSrcReg(std::ostream &os, int reg) const
Definition: static_inst.cc:88
gem5::StaticInst::simpleAsBytes
size_t simpleAsBytes(void *buf, size_t max_size, const T &t)
Definition: static_inst.hh:383
gem5::SparcISA::Equal
@ Equal
Definition: static_inst.hh:51
gem5::SparcISA::FLess
@ FLess
Definition: static_inst.hh:75
gem5::loader::SymbolTable
Definition: symtab.hh:65
gem5::SparcISA::SparcStaticInst::advancePC
void advancePC(PCState &pcState) const override
Definition: static_inst.cc:82
gem5::SparcISA::FUnorderedOrEqual
@ FUnorderedOrEqual
Definition: static_inst.hh:80
gem5::SparcISA::OverflowClear
@ OverflowClear
Definition: static_inst.hh:62
gem5::SparcISA::SparcStaticInst::machInst
ExtMachInst machInst
Definition: static_inst.hh:94
gem5::SparcISA::SparcStaticInst::printRegArray
void printRegArray(std::ostream &os, const RegId *indexArray, int num) const
Definition: static_inst.cc:69
gem5::SparcISA::FpCondTest
FpCondTest
Definition: static_inst.hh:68
gem5::SparcISA::LessOrEqual
@ LessOrEqual
Definition: static_inst.hh:53
gem5::SparcISA::LessOrEqualUnsigned
@ LessOrEqualUnsigned
Definition: static_inst.hh:57
gem5::StaticInst
Base, ISA-independent static instruction class.
Definition: static_inst.hh:88
gem5::SparcISA::GreaterUnsigned
@ GreaterUnsigned
Definition: static_inst.hh:56
gem5::SparcISA::SparcStaticInst::printDestReg
void printDestReg(std::ostream &os, int reg) const
Definition: static_inst.cc:95
gem5::SparcISA::FGreater
@ FGreater
Definition: static_inst.hh:73
gem5::SparcISA::GreaterOrEqual
@ GreaterOrEqual
Definition: static_inst.hh:54
static_inst.hh
gem5::SparcISA::FLessOrGreater
@ FLessOrGreater
Definition: static_inst.hh:77
gem5::SparcISA::SparcStaticInst::buildRetPC
PCState buildRetPC(const PCState &curPC, const PCState &callPC) const override
Definition: static_inst.hh:125
types.hh
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::SparcISA::FOrdered
@ FOrdered
Definition: static_inst.hh:85
gem5::SparcISA::FNotEqual
@ FNotEqual
Definition: static_inst.hh:78
gem5::SparcISA::SparcStaticInst::printReg
static void printReg(std::ostream &os, RegId reg)
Definition: static_inst.cc:102
gem5::X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:92
gem5::SparcISA::CondTestAbbrev
const char * CondTestAbbrev[]
Definition: static_inst.cc:42
gem5::SparcISA::SparcStaticInst::SparcStaticInst
SparcStaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)
Definition: static_inst.hh:96
gem5::SparcISA::FUnorderedOrGreaterOrEqual
@ FUnorderedOrGreaterOrEqual
Definition: static_inst.hh:82
gem5::SparcISA::FUnordered
@ FUnordered
Definition: static_inst.hh:72
gem5::SparcISA::FEqual
@ FEqual
Definition: static_inst.hh:79
gem5::X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:809
gem5::SparcISA::SparcStaticInst::passesCondition
static bool passesCondition(uint32_t codes, uint32_t condition)
Definition: static_inst.cc:330
gem5::SparcISA::Greater
@ Greater
Definition: static_inst.hh:52
gem5::GenericISA::DelaySlotUPCState
Definition: types.hh:384
exec_context.hh
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5::SparcISA::FLessOrEqual
@ FLessOrEqual
Definition: static_inst.hh:83
gem5::SparcISA::SparcStaticInst::asBytes
size_t asBytes(void *buf, size_t size) override
Instruction classes can override this function to return a a representation of themselves as a blob o...
Definition: static_inst.hh:119
gem5::SparcISA::Positive
@ Positive
Definition: static_inst.hh:60
trace.hh
gem5::SparcISA::SparcStaticInst::printMnemonic
static void printMnemonic(std::ostream &os, const char *mnemonic)
Definition: static_inst.cc:63
gem5::SparcISA::FNever
@ FNever
Definition: static_inst.hh:71
gem5::SparcISA::Negative
@ Negative
Definition: static_inst.hh:61
gem5::StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:281
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::SparcISA::Always
@ Always
Definition: static_inst.hh:48
gem5::GenericISA::SimplePCState::pc
Addr pc() const
Definition: types.hh:151
gem5::SparcISA::SparcStaticInst::passesFpCondition
static bool passesFpCondition(uint32_t fcc, uint32_t condition)
Definition: static_inst.cc:285
gem5::SparcISA::CondTest
CondTest
Definition: static_inst.hh:46
gem5::RegId
Register ID: describe an architectural register with its class and index.
Definition: reg_class.hh:88
gem5::GenericISA::DelaySlotUPCState::uEnd
void uEnd()
Definition: types.hh:433

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