30#ifndef __ARCH_SPARC_INSTS_STATIC_INST_HH__
31#define __ARCH_SPARC_INSTS_STATIC_INST_HH__
113 const RegId *indexArray,
int num)
const;
127 std::unique_ptr<PCStateBase>
135 return std::unique_ptr<PCStateBase>{ret_ptr};
virtual PCStateBase * clone() const =0
Register ID: describe an architectural register with its class and index.
Base class for all SPARC static instructions.
void printRegArray(std::ostream &os, const RegId *indexArray, int num) const
static bool passesCondition(uint32_t codes, uint32_t condition)
SparcStaticInst(const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass)
static void printReg(std::ostream &os, RegId reg)
static void printMnemonic(std::ostream &os, const char *mnemonic)
void advancePC(PCStateBase &pcState) const override
std::unique_ptr< PCStateBase > buildRetPC(const PCStateBase &cur_pc, const PCStateBase &call_pc) const override
void printDestReg(std::ostream &os, int reg) const
static bool passesFpCondition(uint32_t fcc, uint32_t condition)
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
size_t asBytes(void *buf, size_t size) override
Instruction classes can override this function to return a a representation of themselves as a blob o...
void printSrcReg(std::ostream &os, int reg) const
Base, ISA-independent static instruction class.
size_t simpleAsBytes(void *buf, size_t max_size, const T &t)
const char * mnemonic
Base mnemonic (e.g., "add").
ThreadContext is the external interface to all thread state for anything outside of the CPU.
@ FUnorderedOrLessOrEqual
@ FUnorderedOrGreaterOrEqual
const char * CondTestAbbrev[]
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.