gem5  v21.1.0.2
branch.cc
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37 
38 #include "arch/arm/insts/branch.hh"
39 
40 #include "base/cprintf.hh"
41 
42 namespace gem5
43 {
44 
45 namespace ArmISA {
46 
47 std::string
49  Addr pc, const loader::SymbolTable *symtab) const
50 {
51  std::stringstream ss;
52  printMnemonic(ss, "", false);
53  printIntReg(ss, op1);
54  return ss.str();
55 }
56 
57 std::string
59  Addr pc, const loader::SymbolTable *symtab) const
60 {
61  std::stringstream ss;
62  printMnemonic(ss, "", false);
63  printTarget(ss, pc + imm, symtab);
64  return ss.str();
65 }
66 
67 std::string
69  Addr pc, const loader::SymbolTable *symtab) const
70 {
71  std::stringstream ss;
72  printMnemonic(ss, "", false);
73  printIntReg(ss, op1);
74  ccprintf(ss, ", ");
75  printIntReg(ss, op2);
76  return ss.str();
77 }
78 
79 } // namespace ArmISA
80 } // namespace gem5
gem5::ArmISA::BranchRegReg::op2
IntRegIndex op2
Definition: branch.hh:116
gem5::ArmISA::BranchRegReg::op1
IntRegIndex op1
Definition: branch.hh:115
gem5::ArmISA::BranchReg::op1
IntRegIndex op1
Definition: branch.hh:85
branch.hh
gem5::ArmISA::ArmStaticInst::printMnemonic
void printMnemonic(std::ostream &os, const std::string &suffix="", bool withPred=true, bool withCond64=false, ConditionCode cond64=COND_UC) const
Definition: static_inst.cc:377
gem5::loader::SymbolTable
Definition: symtab.hh:65
gem5::ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:130
gem5::ArmISA::ArmStaticInst::printTarget
void printTarget(std::ostream &os, Addr target, const loader::SymbolTable *symtab) const
Definition: static_inst.cc:398
cprintf.hh
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::ArmISA::BranchRegReg::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: branch.cc:68
gem5::ArmISA::BranchImm::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: branch.cc:58
gem5::ArmISA::ss
Bitfield< 21 > ss
Definition: misc_types.hh:59
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5::ArmISA::BranchImm::imm
int32_t imm
Definition: branch.hh:55
gem5::ArmISA::ArmStaticInst::printIntReg
void printIntReg(std::ostream &os, RegIndex reg_idx, uint8_t opWidth=0) const
Print a register name for disassembly given the unique dependence tag number (FP or int).
Definition: static_inst.cc:299
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::ArmISA::BranchReg::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: branch.cc:48

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