gem5 v24.1.0.1
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Implementaton of AArch64 TLBI ALLE(1,2,3)(IS) instructions. More...
#include <tlbi_op.hh>
Public Member Functions | |
TLBIALLEL (TranslationRegime _target_regime, SecurityState _ss, Attr _attr) | |
void | operator() (ThreadContext *tc) override |
bool | matchEntry (TlbEntry *entry, vmid_t curr_vmid) const override |
bool | stage2Flush () const override |
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class. | |
Public Member Functions inherited from gem5::ArmISA::TLBIOp | |
TLBIOp (TranslationRegime _target_regime, SecurityState _ss, Attr _attr) | |
virtual | ~TLBIOp () |
void | broadcast (ThreadContext *tc) |
Broadcast the TLB Invalidate operation to all TLBs in the Arm system. | |
bool | match (TlbEntry *entry, vmid_t curr_vmid) const |
virtual bool | stage1Flush () const |
Return true if the TLBI op needs to flush stage1 entries, Defaulting to true in the TLBIOp abstract class. | |
Additional Inherited Members | |
Public Types inherited from gem5::ArmISA::TLBIOp | |
enum class | Attr { None , ExcludeXS } |
Public Attributes inherited from gem5::ArmISA::TLBIOp | |
SecurityState | ss |
TranslationRegime | targetRegime |
Attr | attr |
Implementaton of AArch64 TLBI ALLE(1,2,3)(IS) instructions.
Definition at line 169 of file tlbi_op.hh.
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inline |
Definition at line 172 of file tlbi_op.hh.
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overridevirtual |
Implements gem5::ArmISA::TLBIOp.
Definition at line 116 of file tlbi_op.cc.
References gem5::ArmISA::TLBIOp::ss, gem5::ArmISA::TLBIOp::targetRegime, and gem5::ArmISA::te.
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overridevirtual |
Reimplemented from gem5::ArmISA::TLBIOp.
Definition at line 104 of file tlbi_op.cc.
References gem5::ArmISA::MMU::flush(), gem5::ThreadContext::getCheckerCpuPtr(), and gem5::ArmISA::getMMUPtr().
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inlineoverridevirtual |
Return true if the TLBI op needs to flush stage2 entries, Defaulting to false in the TLBIOp abstract class.
Reimplemented from gem5::ArmISA::TLBIOp.
Definition at line 181 of file tlbi_op.hh.
References gem5::ArmISA::EL10, gem5::ArmISA::EL20, and gem5::ArmISA::TLBIOp::targetRegime.