gem5  v22.0.0.1
execute.hh
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37 
45 #ifndef __CPU_MINOR_EXECUTE_HH__
46 #define __CPU_MINOR_EXECUTE_HH__
47 
48 #include <vector>
49 
50 #include "base/named.hh"
51 #include "base/types.hh"
52 #include "cpu/minor/buffers.hh"
53 #include "cpu/minor/cpu.hh"
54 #include "cpu/minor/func_unit.hh"
55 #include "cpu/minor/lsq.hh"
56 #include "cpu/minor/pipe_data.hh"
57 #include "cpu/minor/scoreboard.hh"
58 
59 namespace gem5
60 {
61 
63 namespace minor
64 {
65 
68 class Execute : public Named
69 {
70  protected:
71 
74 
77 
80 
82  unsigned int issueLimit;
83 
85  unsigned int memoryIssueLimit;
86 
88  unsigned int commitLimit;
89 
91  unsigned int memoryCommitLimit;
92 
97 
100 
102  unsigned int numFuncUnits;
103 
107 
110 
113 
117 
120  unsigned int noCostFUIndex;
121 
124 
127 
130 
131  public: /* Public for Pipeline to be able to pass it to Decode */
133 
134  protected:
146  {
147  NotDraining, /* Not draining, possibly running */
148  DrainCurrentInst, /* Draining to end of inst/macroop */
149  DrainHaltFetch, /* Halting Fetch after completing current inst */
150  DrainAllInsts /* Discarding all remaining insts */
151  };
152 
154  {
156  ExecuteThreadInfo(unsigned int insts_committed) :
157  inputIndex(0),
159  instsBeingCommitted(insts_committed),
160  streamSeqNum(InstId::firstStreamSeqNum),
161  lastPredictionSeqNum(InstId::firstPredictionSeqNum),
163  { }
164 
166  inputIndex(other.inputIndex),
169  streamSeqNum(other.streamSeqNum),
171  drainState(other.drainState)
172  { }
173 
176 
179 
182  unsigned int inputIndex;
183 
187 
191 
197 
203 
206  };
207 
209 
213 
214  protected:
215  friend std::ostream &operator <<(std::ostream &os, DrainState state);
216 
219  const ForwardInstData *getInput(ThreadID tid);
220 
222  void popInput(ThreadID tid);
223 
227  void tryToBranch(MinorDynInstPtr inst, Fault fault, BranchData &branch);
228 
232  MinorDynInstPtr inst, const PCStateBase &target, BranchData &branch);
233 
240  LSQ::LSQRequestPtr response, BranchData &branch,
241  Fault &fault);
242 
254  bool executeMemRefInst(MinorDynInstPtr inst, BranchData &branch,
255  bool &failed_predicate, Fault &fault);
256 
258  bool isInterrupted(ThreadID thread_id) const;
259 
261  bool isInbetweenInsts(ThreadID thread_id) const;
262 
265  bool takeInterrupt(ThreadID thread_id, BranchData &branch);
266 
268  unsigned int issue(ThreadID thread_id);
269 
272  bool tryPCEvents(ThreadID thread_id);
273 
277 
281  ThreadID checkInterrupts(BranchData& branch, bool& interrupted);
282 
285  bool hasInterrupt(ThreadID thread_id);
286 
301  bool commitInst(MinorDynInstPtr inst, bool early_memory_issue,
302  BranchData &branch, Fault &fault, bool &committed,
303  bool &completed_mem_issue);
304 
312  void commit(ThreadID thread_id, bool only_commit_microops, bool discard,
313  BranchData &branch);
314 
316  void setDrainState(ThreadID thread_id, DrainState state);
317 
322 
323  public:
324  Execute(const std::string &name_,
325  MinorCPU &cpu_,
326  const BaseMinorCPUParams &params,
329 
330  ~Execute();
331 
332  public:
333 
336 
338  LSQ &getLSQ() { return lsq; }
339 
343 
346  bool instIsHeadInst(MinorDynInstPtr inst);
347 
349  void evaluate();
350 
351  void minorTrace() const;
352 
355  bool isDrained();
356 
358  unsigned int drain();
359  void drainResume();
360 };
361 
362 } // namespace minor
363 } // namespace gem5
364 
365 #endif /* __CPU_MINOR_EXECUTE_HH__ */
gem5::minor::LSQ
Definition: lsq.hh:68
pipe_data.hh
gem5::minor::Execute::getCommittingThread
ThreadID getCommittingThread()
Use the current threading policy to determine the next thread to decode from.
Definition: execute.cc:1693
scoreboard.hh
gem5::minor::Execute::tryToBranch
void tryToBranch(MinorDynInstPtr inst, Fault fault, BranchData &branch)
Generate Branch data based (into branch) on an observed (or not) change in PC while executing an inst...
Definition: execute.cc:221
gem5::minor::BranchData::Reason
Reason
Definition: pipe_data.hh:69
gem5::minor::InstId
Id for lines and instructions.
Definition: dyn_inst.hh:76
gem5::minor::Execute::NotDraining
@ NotDraining
Definition: execute.hh:147
gem5::minor::Execute::ExecuteThreadInfo::inputIndex
unsigned int inputIndex
Index that we've completed upto in getInput data.
Definition: execute.hh:182
gem5::minor::Execute::drain
unsigned int drain()
Like the drain interface on SimObject.
Definition: execute.cc:1831
gem5::minor::Execute::commitLimit
unsigned int commitLimit
Number of instructions that can be committed per cycle.
Definition: execute.hh:88
gem5::MinorCPU::MinorCPUPort
Provide a non-protected base class for Minor's Ports as derived classes are created by Fetch1 and Exe...
Definition: cpu.hh:106
gem5::MinorFUPool
A collection of MinorFUs.
Definition: func_unit.hh:189
gem5::minor::Execute::fuDescriptions
MinorFUPool & fuDescriptions
Descriptions of the functional units we want to generate.
Definition: execute.hh:99
named.hh
gem5::minor::Execute::operator<<
friend std::ostream & operator<<(std::ostream &os, DrainState state)
Definition: execute.cc:1799
gem5::minor::Queue
Wrapper for a queue type to act as a pipeline stage input queue.
Definition: buffers.hh:404
gem5::minor::Execute::ExecuteThreadInfo
Definition: execute.hh:153
gem5::minor::Execute::checkInterrupts
ThreadID checkInterrupts(BranchData &branch, bool &interrupted)
Check all threads for possible interrupts.
Definition: execute.cc:1614
cpu.hh
minor
gem5::MinorCPU
MinorCPU is an in-order CPU model with four fixed pipeline stages:
Definition: cpu.hh:85
gem5::minor::Execute::lsq
LSQ lsq
Dcache port to pass on to the CPU.
Definition: execute.hh:123
gem5::minor::Execute::ExecuteThreadInfo::inFUMemInsts
Queue< QueuedInst, ReportTraitsAdaptor< QueuedInst > > * inFUMemInsts
Memory ref instructions still in the FUs.
Definition: execute.hh:178
gem5::minor::Execute::DrainCurrentInst
@ DrainCurrentInst
Definition: execute.hh:148
gem5::minor::Execute::evaluate
void evaluate()
Pass on input/buffer data to the output if you can.
Definition: execute.cc:1427
std::vector
STL vector class.
Definition: stl.hh:37
gem5::minor::Execute::takeInterrupt
bool takeInterrupt(ThreadID thread_id, BranchData &branch)
Act on an interrupt.
Definition: execute.cc:423
gem5::minor::ForwardInstData
Forward flowing data between Fetch2,Decode,Execute carrying a packet of instructions of a width appro...
Definition: pipe_data.hh:284
gem5::minor::Execute::setTraceTimeOnIssue
bool setTraceTimeOnIssue
Modify instruction trace times on issue.
Definition: execute.hh:112
gem5::minor::Execute::isInterrupted
bool isInterrupted(ThreadID thread_id) const
Has an interrupt been raised.
Definition: execute.cc:417
gem5::minor::Execute::hasInterrupt
bool hasInterrupt(ThreadID thread_id)
Checks if a specific thread has an interrupt.
Definition: execute.cc:1649
gem5::minor::Execute::memoryCommitLimit
unsigned int memoryCommitLimit
Number of memory instructions that can be committed per cycle.
Definition: execute.hh:91
gem5::minor::Execute::commit
void commit(ThreadID thread_id, bool only_commit_microops, bool discard, BranchData &branch)
Try and commit instructions from the ends of the functional unit pipelines.
Definition: execute.cc:1037
gem5::minor::Execute::commitPriority
ThreadID commitPriority
Definition: execute.hh:212
gem5::minor::Execute::ExecuteThreadInfo::streamSeqNum
InstSeqNum streamSeqNum
Source of sequence number for instuction streams.
Definition: execute.hh:196
gem5::minor::Execute::noCostFUIndex
unsigned int noCostFUIndex
The FU index of the non-existent costless FU for instructions which pass the MinorDynInst::isNoCostIn...
Definition: execute.hh:120
gem5::RefCountingPtr< MinorDynInst >
gem5::Cycles
Cycles is a wrapper class for representing cycle counts, i.e.
Definition: types.hh:78
gem5::minor::LSQ::LSQRequest
Derived SenderState to carry data access info.
Definition: lsq.hh:127
gem5::minor::Execute::getIssuingThread
ThreadID getIssuingThread()
Definition: execute.cc:1760
gem5::minor::Execute::getLSQ
LSQ & getLSQ()
To allow ExecContext to find the LSQ.
Definition: execute.hh:338
gem5::Named
Interface for things with names.
Definition: named.hh:38
gem5::minor::Execute::inputBuffer
std::vector< InputBuffer< ForwardInstData > > inputBuffer
Definition: execute.hh:132
gem5::minor::Latch::Output
Definition: buffers.hh:263
gem5::minor::Execute::Execute
Execute(const std::string &name_, MinorCPU &cpu_, const BaseMinorCPUParams &params, Latch< ForwardInstData >::Output inp_, Latch< BranchData >::Input out_)
Definition: execute.cc:64
gem5::minor::Execute::getInput
const ForwardInstData * getInput(ThreadID tid)
Get a piece of data to work on from the inputBuffer, or 0 if there is no data.
Definition: execute.cc:199
gem5::minor::Execute::longestFuLatency
Cycles longestFuLatency
Longest latency of any FU, useful for setting up the activity recoder.
Definition: execute.hh:106
gem5::minor::Execute::minorTrace
void minorTrace() const
Definition: execute.cc:1660
gem5::Fault
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248
gem5::minor::Execute::processMoreThanOneInput
bool processMoreThanOneInput
If true, more than one input line can be processed each cycle if there is room to execute more instru...
Definition: execute.hh:96
gem5::minor::Latch::Input
Encapsulate wires on either input or output of the latch.
Definition: buffers.hh:252
gem5::minor::Execute::isDrained
bool isDrained()
After thread suspension, has Execute been drained of in-flight instructions and memory accesses.
Definition: execute.cc:1853
func_unit.hh
gem5::minor::Execute::commitInst
bool commitInst(MinorDynInstPtr inst, bool early_memory_issue, BranchData &branch, Fault &fault, bool &committed, bool &completed_mem_issue)
Commit a single instruction.
Definition: execute.cc:895
gem5::minor::Execute::doInstCommitAccounting
void doInstCommitAccounting(MinorDynInstPtr inst)
Do the stats handling and instruction count and PC event events related to the new instruction/op cou...
Definition: execute.cc:864
gem5::minor::Execute::issuePriority
ThreadID issuePriority
Definition: execute.hh:211
gem5::minor::Execute::ExecuteThreadInfo::instsBeingCommitted
ForwardInstData instsBeingCommitted
Structure for reporting insts currently being processed/retired for MinorTrace.
Definition: execute.hh:190
gem5::minor::Execute::scoreboard
std::vector< Scoreboard > scoreboard
Scoreboard of instruction dependencies.
Definition: execute.hh:126
gem5::minor::BranchData
Forward data betwen Execute and Fetch1 carrying change-of-address/stream information.
Definition: pipe_data.hh:66
gem5::minor::Execute::isInbetweenInsts
bool isInbetweenInsts(ThreadID thread_id) const
Are we between instructions? Can we be interrupted?
Definition: execute.cc:1420
gem5::minor::Execute::getDcachePort
MinorCPU::MinorCPUPort & getDcachePort()
Returns the DcachePort owned by this Execute to pass upwards.
Definition: execute.cc:1896
gem5::minor::Execute::updateBranchData
void updateBranchData(ThreadID tid, BranchData::Reason reason, MinorDynInstPtr inst, const PCStateBase &target, BranchData &branch)
Actually create a branch to communicate to Fetch1/Fetch2 and, if that is a stream-changing branch upd...
Definition: execute.cc:300
gem5::GEM5_DEPRECATED_NAMESPACE
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
gem5::minor::Execute::tryPCEvents
bool tryPCEvents(ThreadID thread_id)
Try to act on PC-related events.
Definition: execute.cc:842
gem5::minor::Execute::~Execute
~Execute()
Definition: execute.cc:1869
gem5::minor::Execute::ExecuteThreadInfo::ExecuteThreadInfo
ExecuteThreadInfo(unsigned int insts_committed)
Constructor.
Definition: execute.hh:156
gem5::minor::Execute::ExecuteThreadInfo::lastCommitWasEndOfMacroop
bool lastCommitWasEndOfMacroop
The last commit was the end of a full instruction so an interrupt can safely happen.
Definition: execute.hh:186
state
atomic_var_t state
Definition: helpers.cc:188
gem5::minor::Execute::DrainHaltFetch
@ DrainHaltFetch
Definition: execute.hh:149
gem5::minor::Execute::popInput
void popInput(ThreadID tid)
Pop an element off the input buffer, if there are any.
Definition: execute.cc:212
gem5::minor::Execute::setTraceTimeOnCommit
bool setTraceTimeOnCommit
Modify instruction trace times on commit.
Definition: execute.hh:109
gem5::minor::Execute::ExecuteThreadInfo::ExecuteThreadInfo
ExecuteThreadInfo(const ExecuteThreadInfo &other)
Definition: execute.hh:165
types.hh
gem5::X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:803
gem5::minor::Execute::setDrainState
void setDrainState(ThreadID thread_id, DrainState state)
Set the drain state (with useful debugging messages)
Definition: execute.cc:1824
gem5::minor::Execute::handleMemResponse
void handleMemResponse(MinorDynInstPtr inst, LSQ::LSQRequestPtr response, BranchData &branch, Fault &fault)
Handle extracting mem ref responses from the memory queues and completing the associated instructions...
Definition: execute.cc:326
gem5::minor::Execute::ExecuteThreadInfo::drainState
DrainState drainState
State progression for draining NotDraining -> ...
Definition: execute.hh:205
gem5::minor::Execute
Execute stage.
Definition: execute.hh:68
gem5::minor::Execute::inp
Latch< ForwardInstData >::Output inp
Input port carrying instructions from Decode.
Definition: execute.hh:73
gem5::minor::Execute::ExecuteThreadInfo::inFlightInsts
Queue< QueuedInst, ReportTraitsAdaptor< QueuedInst > > * inFlightInsts
In-order instructions either in FUs or the LSQ.
Definition: execute.hh:175
gem5::InstSeqNum
uint64_t InstSeqNum
Definition: inst_seq.hh:40
gem5::minor::Execute::executeMemRefInst
bool executeMemRefInst(MinorDynInstPtr inst, BranchData &branch, bool &failed_predicate, Fault &fault)
Execute a memory reference instruction.
Definition: execute.cc:451
gem5::minor::Execute::out
Latch< BranchData >::Input out
Input port carrying stream changes to Fetch1.
Definition: execute.hh:76
buffers.hh
gem5::minor::Execute::allowEarlyMemIssue
bool allowEarlyMemIssue
Allow mem refs to leave their FUs before reaching the head of the in flight insts queue if their depe...
Definition: execute.hh:116
gem5::minor::Execute::DrainState
DrainState
Stage cycle-by-cycle state.
Definition: execute.hh:145
gem5::minor::Execute::numFuncUnits
unsigned int numFuncUnits
Number of functional units to produce.
Definition: execute.hh:102
gem5::minor::Execute::drainResume
void drainResume()
Definition: execute.cc:1788
gem5::minor::Execute::ExecuteThreadInfo::lastPredictionSeqNum
InstSeqNum lastPredictionSeqNum
A prediction number for use where one isn't available from an instruction.
Definition: execute.hh:202
gem5::minor::Execute::funcUnits
std::vector< FUPipeline * > funcUnits
The execution functional units.
Definition: execute.hh:129
gem5::PCStateBase
Definition: pcstate.hh:57
gem5::minor::Execute::issueLimit
unsigned int issueLimit
Number of instructions that can be issued per cycle.
Definition: execute.hh:82
gem5::minor::Execute::executeInfo
std::vector< ExecuteThreadInfo > executeInfo
Definition: execute.hh:208
gem5::minor::Execute::issue
unsigned int issue(ThreadID thread_id)
Try and issue instructions from the inputBuffer.
Definition: execute.cc:548
gem5::minor::Execute::cpu
MinorCPU & cpu
Pointer back to the containing CPU.
Definition: execute.hh:79
gem5::minor::Execute::interruptPriority
ThreadID interruptPriority
Definition: execute.hh:210
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::minor::Execute::instIsHeadInst
bool instIsHeadInst(MinorDynInstPtr inst)
Returns true if the given instruction is at the head of the inFlightInsts instruction queue.
Definition: execute.cc:1885
gem5::minor::Execute::memoryIssueLimit
unsigned int memoryIssueLimit
Number of memory ops that can be issued per cycle.
Definition: execute.hh:85
gem5::minor::Execute::DrainAllInsts
@ DrainAllInsts
Definition: execute.hh:150
lsq.hh
gem5::ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:235
gem5::minor::Execute::instIsRightStream
bool instIsRightStream(MinorDynInstPtr inst)
Does the given instruction have the right stream sequence number to be committed?
Definition: execute.cc:1879

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