#include <lsq.hh>

Inheritance diagram for gem5::minor::LSQ:

Classes
class	BarrierDataRequest
	Request for doing barrier accounting in the store buffer. More...

class	DcachePort
	Exposable data port. More...

class	FailedDataRequest
	FailedDataRequest represents requests from instructions that failed their predicates but need to ride the requests/transfers queues to maintain trace ordering. More...

class	LSQRequest
	Derived SenderState to carry data access info. More...

class	SingleDataRequest
	SingleDataRequest is used for requests that don't fragment. More...

class	SpecialDataRequest
	Special request types that don't actually issue memory requests. More...

class	SplitDataRequest

class	StoreBuffer
	Store buffer. More...

Public Types
typedef LSQRequest *	LSQRequestPtr

typedef Queue< LSQRequestPtr, ReportTraitsPtrAdaptor< LSQRequestPtr >, NoBubbleTraits< LSQRequestPtr > >	LSQQueue
	The LSQ consists of three queues: requests, transfers and the store buffer storeBuffer.

Public Member Functions
	LSQ (std::string name_, std::string dcache_port_name_, MinorCPU &cpu_, Execute &execute_, unsigned int max_accesses_in_memory_system, unsigned int line_width, unsigned int requests_queue_size, unsigned int transfers_queue_size, unsigned int store_buffer_size, unsigned int store_buffer_cycle_store_limit)

virtual	~LSQ ()

void	step ()
	Step checks the queues to see if their are issuable transfers which were not otherwise picked up by tests at the end of other events.

bool	canRequest ()
	Is their space in the request queue to be able to push a request by issuing an isMemRef instruction.

LSQRequestPtr	findResponse (MinorDynInstPtr inst)
	Returns a response if it's at the head of the transfers queue and it's either complete or can be sent on to the store buffer.

void	popResponse (LSQRequestPtr response)
	Sanity check and pop the head response.

bool	canPushIntoStoreBuffer () const
	Must check this before trying to insert into the store buffer.

void	sendStoreToStoreBuffer (LSQRequestPtr request)
	A store has been committed, please move it to the store buffer.

bool	accessesInFlight () const
	Are there any accesses other than normal cached loads in the memory system or having received responses which need to be handled for their instruction's to be completed.

void	issuedMemBarrierInst (MinorDynInstPtr inst)
	A memory barrier instruction has been issued, remember its execSeqNum that we can avoid issuing memory ops until it is committed.

InstSeqNum	getLastMemBarrier (ThreadID thread_id) const
	Get the execSeqNum of the last issued memory barrier.

bool	isDrained ()
	Is there nothing left in the LSQ.

bool	needsToTick ()
	May need to be ticked next cycle as one of the queues contains an actionable transfers or address translation.

void	completeMemBarrierInst (MinorDynInstPtr inst, bool committed)
	Complete a barrier instruction.

Fault	pushRequest (MinorDynInstPtr inst, bool isLoad, uint8_t data, unsigned int size, Addr addr, Request::Flags flags, uint64_t res, AtomicOpFunctorPtr amo_op, const std::vector< bool > &byte_enable=std::vector< bool >())
	Single interface for readMem/writeMem/amoMem to issue requests into the LSQ.

void	pushFailedRequest (MinorDynInstPtr inst)
	Push a predicate failed-representing request into the queues just to maintain commit order.

bool	recvTimingResp (PacketPtr pkt)
	Memory interface.

void	recvReqRetry ()

void	recvTimingSnoopReq (PacketPtr pkt)

MinorCPU::MinorCPUPort &	getDcachePort ()
	Return the raw-bindable port.

void	minorTrace () const

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Public Attributes
MemoryState	state
	Retry state of last issued memory transfer.

const unsigned int	inMemorySystemLimit
	Maximum number of in-flight accesses issued to the memory system.

const Addr	lineWidth
	Memory system access width (and snap) in bytes.

LSQQueue	requests
	requests contains LSQRequests which have been issued to the TLB by calling ExecContext::readMem/writeMem (which in turn calls LSQ::pushRequest and LSQRequest::startAddrTranslation).

LSQQueue	transfers
	Once issued to memory (or, for stores, just had their state changed to StoreToStoreBuffer) LSQRequests pass through transfers waiting for memory responses.

StoreBuffer	storeBuffer

Protected Types
enum	MemoryState { MemoryRunning , MemoryNeedsRetry }
	State of memory access for head access. More...

enum	AddrRangeCoverage { PartialAddrRangeCoverage , FullAddrRangeCoverage , NoAddrRangeCoverage }
	Coverage of one address range with another. More...

Protected Member Functions
void	tryToSendToTransfers (LSQRequestPtr request)
	Try and issue a memory access for a translated request at the head of the requests queue.

bool	tryToSend (LSQRequestPtr request)
	Try to send (or resend) a memory request's next/only packet to the memory system.

void	clearMemBarrier (MinorDynInstPtr inst)
	Clear a barrier (if it's the last one marked up in lastMemBarrier)

void	moveFromRequestsToTransfers (LSQRequestPtr request)
	Move a request between queues.

bool	canSendToMemorySystem ()
	Can a request be sent to the memory system.

void	threadSnoop (LSQRequestPtr request)
	Snoop other threads monitors on memory system accesses.

Protected Attributes
MinorCPU &	cpu
	My owner(s)

Execute &	execute

DcachePort	dcachePort

std::vector< InstSeqNum >	lastMemBarrier
	Most recent execSeqNum of a memory barrier instruction or 0 if there are no in-flight barriers.

unsigned int	numAccessesInMemorySystem
	Count of the number of mem.

unsigned int	numAccessesInDTLB
	Number of requests in the DTLB in the requests queue.

unsigned int	numStoresInTransfers
	The number of stores in the transfers queue.

unsigned int	numAccessesIssuedToMemory
	The number of accesses which have been issued to the memory system but have not been committed/discarded excluding cacheable normal loads which don't need to be tracked.

LSQRequestPtr	retryRequest
	The request (from either requests or the store buffer) which is currently waiting have its memory access retried.

Addr	cacheBlockMask
	Address Mask for a cache block (e.g.

Friends
std::ostream &	operator<< (std::ostream &os, LSQ::MemoryState state)
	Print MemoryState values as shown in the enum definition.

std::ostream &	operator<< (std::ostream &os, LSQ::AddrRangeCoverage coverage)

std::ostream &	operator<< (std::ostream &os, LSQRequest::LSQRequestState state)

Detailed Description

Definition at line 67 of file lsq.hh.

Member Typedef Documentation

◆ LSQQueue

typedef Queue<LSQRequestPtr, ReportTraitsPtrAdaptor<LSQRequestPtr>, NoBubbleTraits<LSQRequestPtr> > gem5::minor::LSQ::LSQQueue

The LSQ consists of three queues: requests, transfers and the store buffer storeBuffer.

Definition at line 560 of file lsq.hh.

◆ LSQRequestPtr

typedef LSQRequest* gem5::minor::LSQ::LSQRequestPtr

Definition at line 274 of file lsq.hh.

Member Enumeration Documentation

◆ AddrRangeCoverage

enum gem5::minor::LSQ::AddrRangeCoverage

protected

Coverage of one address range with another.

Enumerator
PartialAddrRangeCoverage
FullAddrRangeCoverage
NoAddrRangeCoverage

Definition at line 87 of file lsq.hh.

◆ MemoryState

enum gem5::minor::LSQ::MemoryState

protected

State of memory access for head access.

Enumerator
MemoryRunning
MemoryNeedsRetry

Definition at line 76 of file lsq.hh.

Constructor & Destructor Documentation

◆ LSQ()

gem5::minor::LSQ::LSQ	(	std::string	name_,
		std::string	dcache_port_name_,
		MinorCPU &	cpu_,
		Execute &	execute_,
		unsigned int	max_accesses_in_memory_system,
		unsigned int	line_width,
		unsigned int	requests_queue_size,
		unsigned int	transfers_queue_size,
		unsigned int	store_buffer_size,
		unsigned int	store_buffer_cycle_store_limit )

Definition at line 1402 of file lsq.cc.

References fatal, lineWidth, and gem5::Named::name().

◆ ~LSQ()

gem5::minor::LSQ::~LSQ ( )

virtual

Definition at line 1457 of file lsq.cc.

Member Function Documentation

◆ accessesInFlight()

bool gem5::minor::LSQ::accessesInFlight ( ) const

inline

Are there any accesses other than normal cached loads in the memory system or having received responses which need to be handled for their instruction's to be completed.

Definition at line 689 of file lsq.hh.

References numAccessesIssuedToMemory.

Referenced by gem5::minor::Execute::isInbetweenInsts(), and gem5::minor::Execute::takeInterrupt().

◆ canPushIntoStoreBuffer()

bool gem5::minor::LSQ::canPushIntoStoreBuffer ( ) const

inline

Must check this before trying to insert into the store buffer.

Definition at line 681 of file lsq.hh.

References gem5::minor::LSQ::StoreBuffer::canInsert(), and storeBuffer.

Referenced by gem5::minor::Execute::commitInst().

◆ canRequest()

bool gem5::minor::LSQ::canRequest ( )

inline

Is their space in the request queue to be able to push a request by issuing an isMemRef instruction.

Definition at line 669 of file lsq.hh.

References requests, and gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::unreservedRemainingSpace().

Referenced by gem5::minor::Execute::commit(), gem5::minor::Execute::executeMemRefInst(), and gem5::minor::Execute::getCommittingThread().

◆ canSendToMemorySystem()

bool gem5::minor::LSQ::canSendToMemorySystem ( )

protected

Can a request be sent to the memory system.

Definition at line 1289 of file lsq.cc.

References inMemorySystemLimit, MemoryRunning, numAccessesInMemorySystem, and state.

Referenced by needsToTick(), tryToSend(), and tryToSendToTransfers().

◆ clearMemBarrier()

void gem5::minor::LSQ::clearMemBarrier ( MinorDynInstPtr inst )

protected

Clear a barrier (if it's the last one marked up in lastMemBarrier)

Definition at line 258 of file lsq.cc.

References DPRINTF, and lastMemBarrier.

Referenced by completeMemBarrierInst().

◆ completeMemBarrierInst()

void gem5::minor::LSQ::completeMemBarrierInst	(	MinorDynInstPtr	inst,
		bool	committed )

Complete a barrier instruction.

Where committed, makes a BarrierDataRequest and pushed it into the store buffer

Definition at line 913 of file lsq.cc.

References clearMemBarrier(), gem5::minor::LSQ::StoreBuffer::insert(), and storeBuffer.

Referenced by gem5::minor::Execute::commit().

◆ findResponse()

LSQ::LSQRequestPtr gem5::minor::LSQ::findResponse ( MinorDynInstPtr inst )

Returns a response if it's at the head of the transfers queue and it's either complete or can be sent on to the store buffer.

After calling, the request still remains on the transfer queue until popResponse is called

Definition at line 1486 of file lsq.cc.

References gem5::minor::LSQ::StoreBuffer::canInsert(), DPRINTF, gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), gem5::minor::LSQ::LSQRequest::inst, gem5::minor::LSQ::LSQRequest::isBarrier(), gem5::minor::LSQ::LSQRequest::isComplete(), gem5::minor::LSQ::LSQRequest::state, storeBuffer, gem5::minor::LSQ::LSQRequest::StoreToStoreBuffer, and transfers.

Referenced by gem5::minor::Execute::commit(), gem5::minor::Execute::evaluate(), and gem5::minor::Execute::getCommittingThread().

◆ getDcachePort()

MinorCPU::MinorCPUPort & gem5::minor::LSQ::getDcachePort ( )

inline

Return the raw-bindable port.

Definition at line 731 of file lsq.hh.

References dcachePort.

Referenced by gem5::minor::Execute::getDcachePort().

◆ getLastMemBarrier()

InstSeqNum gem5::minor::LSQ::getLastMemBarrier ( ThreadID thread_id ) const

inline

Get the execSeqNum of the last issued memory barrier.

Definition at line 698 of file lsq.hh.

References lastMemBarrier.

Referenced by gem5::minor::Execute::commit(), and gem5::minor::Execute::issue().

◆ isDrained()

bool gem5::minor::LSQ::isDrained ( )

Is there nothing left in the LSQ.

Definition at line 1556 of file lsq.cc.

References gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), gem5::minor::LSQ::StoreBuffer::isDrained(), requests, storeBuffer, and transfers.

Referenced by gem5::minor::Execute::isDrained().

◆ issuedMemBarrierInst()

void gem5::minor::LSQ::issuedMemBarrierInst ( MinorDynInstPtr inst )

A memory barrier instruction has been issued, remember its execSeqNum that we can avoid issuing memory ops until it is committed.

Definition at line 1717 of file lsq.cc.

References lastMemBarrier.

Referenced by gem5::minor::Execute::issue().

◆ minorTrace()

void gem5::minor::LSQ::minorTrace ( ) const

Definition at line 1673 of file lsq.cc.

References lastMemBarrier, gem5::minor::LSQ::StoreBuffer::minorTrace(), gem5::minor::minorTrace(), gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::minorTrace(), numAccessesInDTLB, numAccessesInMemorySystem, numStoresInTransfers, requests, state, storeBuffer, and transfers.

Referenced by gem5::minor::Execute::minorTrace().

◆ moveFromRequestsToTransfers()

void gem5::minor::LSQ::moveFromRequestsToTransfers ( LSQRequestPtr request )

protected

Move a request between queues.

Definition at line 1272 of file lsq.cc.

References gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), gem5::minor::LSQ::LSQRequest::isLoad, numStoresInTransfers, gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::pop(), gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::push(), requests, transfers, and gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::unreservedRemainingSpace().

Referenced by recvReqRetry(), and tryToSendToTransfers().

◆ needsToTick()

bool gem5::minor::LSQ::needsToTick ( )

May need to be ticked next cycle as one of the queues contains an actionable transfers or address translation.

Definition at line 1563 of file lsq.cc.

References canSendToMemorySystem(), DPRINTF, gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), gem5::minor::LSQ::LSQRequest::InTranslation, gem5::minor::LSQ::StoreBuffer::numUnissuedStores(), requests, gem5::minor::LSQ::LSQRequest::state, storeBuffer, transfers, and gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::unreservedRemainingSpace().

Referenced by gem5::minor::Execute::evaluate().

◆ popResponse()

void gem5::minor::LSQ::popResponse ( LSQ::LSQRequestPtr response )

Sanity check and pop the head response.

Definition at line 1521 of file lsq.cc.

References DPRINTF, gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), gem5::minor::LSQ::LSQRequest::inst, gem5::minor::LSQ::LSQRequest::isLoad, gem5::minor::LSQ::LSQRequest::issuedToMemory, numAccessesIssuedToMemory, numStoresInTransfers, gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::pop(), gem5::minor::LSQ::LSQRequest::state, gem5::minor::LSQ::LSQRequest::StoreInStoreBuffer, and transfers.

Referenced by gem5::minor::Execute::commit(), and gem5::minor::Execute::handleMemResponse().

◆ pushFailedRequest()

void gem5::minor::LSQ::pushFailedRequest ( MinorDynInstPtr inst )

Push a predicate failed-representing request into the queues just to maintain commit order.

Definition at line 1666 of file lsq.cc.

References gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::push(), and requests.

Referenced by gem5::minor::Execute::executeMemRefInst().

◆ pushRequest()

Fault gem5::minor::LSQ::pushRequest	(	MinorDynInstPtr	inst,
		bool	isLoad,
		uint8_t *	data,
		unsigned int	size,
		Addr	addr,
		Request::Flags	flags,
		uint64_t *	res,
		AtomicOpFunctorPtr	amo_op,
		const std::vector< bool > &	byte_enable = std::vector<bool>() )

Single interface for readMem/writeMem/amoMem to issue requests into the LSQ.

Definition at line 1583 of file lsq.cc.

References gem5::X86ISA::addr, cpu, data, gem5::BaseCPU::dataRequestorId(), DPRINTF, flags, lineWidth, gem5::Request::NO_ACCESS, gem5::NoFault, panic, gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::push(), gem5::minor::LSQ::LSQRequest::request, requests, gem5::minor::LSQ::LSQRequest::startAddrTranslation(), gem5::Request::STORE_NO_DATA, gem5::MinorCPU::threads, and gem5::transferNeedsBurst().

Referenced by gem5::minor::ExecContext::initiateMemAMO(), gem5::minor::ExecContext::initiateMemRead(), and gem5::minor::ExecContext::writeMem().

◆ recvReqRetry()

◆ recvTimingResp()

bool gem5::minor::LSQ::recvTimingResp ( PacketPtr pkt )

Memory interface.

Definition at line 1296 of file lsq.cc.

Referenced by gem5::minor::LSQ::DcachePort::recvTimingResp().

◆ recvTimingSnoopReq()

void gem5::minor::LSQ::recvTimingSnoopReq ( PacketPtr pkt )

Definition at line 1762 of file lsq.cc.

References cacheBlockMask, cpu, gem5::AddressMonitor::doMonitor(), gem5::BaseCPU::getContext(), gem5::BaseCPU::getCpuAddrMonitor(), gem5::ThreadContext::getIsaPtr(), gem5::BaseISA::handleLockedSnoop(), gem5::Packet::isInvalidate(), gem5::Packet::isWrite(), gem5::BaseCPU::numThreads, and gem5::MinorCPU::wakeup().

Referenced by gem5::minor::LSQ::DcachePort::recvTimingSnoopReq().

◆ sendStoreToStoreBuffer()

void gem5::minor::LSQ::sendStoreToStoreBuffer ( LSQRequestPtr request )

A store has been committed, please move it to the store buffer.

Definition at line 1543 of file lsq.cc.

References DPRINTF, gem5::minor::LSQ::StoreBuffer::insert(), gem5::minor::LSQ::LSQRequest::inst, gem5::minor::LSQ::LSQRequest::state, storeBuffer, and gem5::minor::LSQ::LSQRequest::StoreToStoreBuffer.

Referenced by gem5::minor::Execute::handleMemResponse().

◆ step()

void gem5::minor::LSQ::step ( )

Step checks the queues to see if their are issuable transfers which were not otherwise picked up by tests at the end of other events.

Step the memory access mechanism on to its next state.

Steppable actions include deferred actions which couldn't be cascaded on the end of a memory response/TLB response event because of resource congestion.

In reality, most of the stepping is done by the callbacks on the LSQ but this function is responsible for issuing memory requests lodged in the requests queue.

Definition at line 1475 of file lsq.cc.

References gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), gem5::minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), requests, gem5::minor::LSQ::StoreBuffer::step(), storeBuffer, and tryToSendToTransfers().

Referenced by gem5::minor::Execute::evaluate().

◆ threadSnoop()

void gem5::minor::LSQ::threadSnoop ( LSQRequestPtr request )

protected

Snoop other threads monitors on memory system accesses.

Definition at line 1782 of file lsq.cc.

References cacheBlockMask, cpu, gem5::AddressMonitor::doMonitor(), gem5::BaseCPU::getContext(), gem5::BaseCPU::getCpuAddrMonitor(), gem5::ThreadContext::getIsaPtr(), gem5::BaseISA::handleLockedSnoop(), gem5::minor::LSQ::LSQRequest::inst, gem5::Packet::isInvalidate(), gem5::Packet::isWrite(), gem5::BaseCPU::numThreads, gem5::minor::LSQ::LSQRequest::packet, and gem5::MinorCPU::wakeup().

Referenced by tryToSend().

◆ tryToSend()

bool gem5::minor::LSQ::tryToSend ( LSQRequestPtr request )

protected

Try to send (or resend) a memory request's next/only packet to the memory system.

Returns true if the request was successfully sent to memory (and was also the last packet in a transfer)

Definition at line 1174 of file lsq.cc.

Referenced by recvReqRetry(), and tryToSendToTransfers().

◆ tryToSendToTransfers()

void gem5::minor::LSQ::tryToSendToTransfers ( LSQRequestPtr request )

protected

Try and issue a memory access for a translated request at the head of the requests queue.

Also tries to move the request between queues

Definition at line 959 of file lsq.cc.

Referenced by step().

Friends And Related Symbol Documentation

◆ operator<< [1/3]

std::ostream & operator<<	(	std::ostream &	os,
		LSQ::AddrRangeCoverage	coverage )

friend

Definition at line 193 of file lsq.cc.

◆ operator<< [2/3]

std::ostream & operator<<	(	std::ostream &	os,
		LSQ::MemoryState	state )

friend

Print MemoryState values as shown in the enum definition.

Definition at line 1744 of file lsq.cc.

◆ operator<< [3/3]

std::ostream & operator<<	(	std::ostream &	os,
		LSQRequest::LSQRequestState	state )

friend

Definition at line 213 of file lsq.cc.

Member Data Documentation

◆ cacheBlockMask

Addr gem5::minor::LSQ::cacheBlockMask

protected

Address Mask for a cache block (e.g.

~(cache_block_size-1))

Definition at line 622 of file lsq.hh.

Referenced by recvTimingSnoopReq(), threadSnoop(), and tryToSendToTransfers().

◆ cpu

MinorCPU& gem5::minor::LSQ::cpu

protected

My owner(s)

Definition at line 71 of file lsq.hh.

Referenced by pushRequest(), recvTimingResp(), recvTimingSnoopReq(), threadSnoop(), tryToSend(), and tryToSendToTransfers().

◆ dcachePort

DcachePort gem5::minor::LSQ::dcachePort

protected

Definition at line 120 of file lsq.hh.

Referenced by getDcachePort(), and tryToSend().

◆ execute

Execute& gem5::minor::LSQ::execute

protected

Definition at line 72 of file lsq.hh.

Referenced by tryToSendToTransfers().

◆ inMemorySystemLimit

const unsigned int gem5::minor::LSQ::inMemorySystemLimit

Maximum number of in-flight accesses issued to the memory system.

Definition at line 548 of file lsq.hh.

Referenced by canSendToMemorySystem().

◆ lastMemBarrier

std::vector<InstSeqNum> gem5::minor::LSQ::lastMemBarrier

protected

Most recent execSeqNum of a memory barrier instruction or 0 if there are no in-flight barriers.

Useful as a dependency for early-issued memory operations

Definition at line 541 of file lsq.hh.

Referenced by clearMemBarrier(), getLastMemBarrier(), issuedMemBarrierInst(), and minorTrace().

◆ lineWidth

const Addr gem5::minor::LSQ::lineWidth

Memory system access width (and snap) in bytes.

Definition at line 551 of file lsq.hh.

Referenced by LSQ(), and pushRequest().

◆ numAccessesInDTLB

unsigned int gem5::minor::LSQ::numAccessesInDTLB

protected

Number of requests in the DTLB in the requests queue.

Definition at line 606 of file lsq.hh.

Referenced by minorTrace().

◆ numAccessesInMemorySystem

unsigned int gem5::minor::LSQ::numAccessesInMemorySystem

protected

Count of the number of mem.

accesses which have left the requests queue and are in the 'wild' in the memory system and who must not be interrupted as they are not normal cacheable accesses. This is a count of the number of in-flight requests with issuedToMemory set who have visited tryToSendRequest at least once

Definition at line 603 of file lsq.hh.

Referenced by canSendToMemorySystem(), minorTrace(), recvTimingResp(), and tryToSend().

◆ numAccessesIssuedToMemory

unsigned int gem5::minor::LSQ::numAccessesIssuedToMemory

protected

The number of accesses which have been issued to the memory system but have not been committed/discarded excluding cacheable normal loads which don't need to be tracked.

Definition at line 615 of file lsq.hh.

Referenced by accessesInFlight(), popResponse(), and tryToSendToTransfers().

◆ numStoresInTransfers

unsigned int gem5::minor::LSQ::numStoresInTransfers

protected

The number of stores in the transfers queue.

Useful when testing if the store buffer contains all the forwardable stores

Definition at line 610 of file lsq.hh.

Referenced by minorTrace(), moveFromRequestsToTransfers(), popResponse(), and tryToSendToTransfers().

◆ requests

LSQQueue gem5::minor::LSQ::requests

requests contains LSQRequests which have been issued to the TLB by calling ExecContext::readMem/writeMem (which in turn calls LSQ::pushRequest and LSQRequest::startAddrTranslation).

Once they have a physical address, requests at the head of requests can be issued to the memory system. At this stage, it cannot be clear that memory accesses must happen (that there are no preceding faults or changes of flow of control) and so only cacheable reads are issued to memory. Cacheable stores are not issued at all (and just pass through 'transfers' in order) and all other transfers are stalled in requests until their corresponding instructions are at the head of the inMemInsts instruction queue and have the right streamSeqNum.

Definition at line 574 of file lsq.hh.

Referenced by canRequest(), isDrained(), minorTrace(), moveFromRequestsToTransfers(), needsToTick(), pushFailedRequest(), pushRequest(), step(), and tryToSendToTransfers().

◆ retryRequest

LSQRequestPtr gem5::minor::LSQ::retryRequest

protected

The request (from either requests or the store buffer) which is currently waiting have its memory access retried.

Definition at line 619 of file lsq.hh.

Referenced by recvReqRetry(), and tryToSend().

◆ state

MemoryState gem5::minor::LSQ::state

Retry state of last issued memory transfer.

Definition at line 545 of file lsq.hh.

Referenced by canSendToMemorySystem(), gem5::minor::LSQ::LSQRequest::isComplete(), minorTrace(), gem5::minor::LSQ::LSQRequest::needsToBeSentToStoreBuffer(), recvReqRetry(), gem5::minor::LSQ::LSQRequest::reportData(), gem5::minor::LSQ::LSQRequest::setState(), tryToSend(), and tryToSendToTransfers().

◆ storeBuffer

StoreBuffer gem5::minor::LSQ::storeBuffer

Definition at line 594 of file lsq.hh.

Referenced by canPushIntoStoreBuffer(), completeMemBarrierInst(), findResponse(), isDrained(), minorTrace(), needsToTick(), recvReqRetry(), recvTimingResp(), sendStoreToStoreBuffer(), step(), and tryToSendToTransfers().

◆ transfers

LSQQueue gem5::minor::LSQ::transfers

Once issued to memory (or, for stores, just had their state changed to StoreToStoreBuffer) LSQRequests pass through transfers waiting for memory responses.

At the head of transfers, Execute::commitInst can pick up the memory response for a request using LSQ::findResponse. Responses to be committed can then have ExecContext::completeAcc on them. Stores can then be pushed into the store buffer. All other transfers will then be complete.

Definition at line 583 of file lsq.hh.

Referenced by findResponse(), isDrained(), minorTrace(), moveFromRequestsToTransfers(), needsToTick(), popResponse(), and tryToSendToTransfers().

The documentation for this class was generated from the following files:

cpu/minor/lsq.hh
cpu/minor/lsq.cc

Classes

Public Types

Public Member Functions

Public Attributes

Protected Types

Protected Member Functions

Protected Attributes

Friends

Detailed Description

Member Typedef Documentation

◆ LSQQueue

◆ LSQRequestPtr

Member Enumeration Documentation

◆ AddrRangeCoverage

◆ MemoryState

Constructor & Destructor Documentation

◆ LSQ()

◆ ~LSQ()

Member Function Documentation

◆ accessesInFlight()

◆ canPushIntoStoreBuffer()

◆ canRequest()

◆ canSendToMemorySystem()

◆ clearMemBarrier()

◆ completeMemBarrierInst()

◆ findResponse()

◆ getDcachePort()

◆ getLastMemBarrier()

◆ isDrained()

◆ issuedMemBarrierInst()

◆ minorTrace()

◆ moveFromRequestsToTransfers()

◆ needsToTick()

◆ popResponse()

◆ pushFailedRequest()

◆ pushRequest()

◆ recvReqRetry()

◆ recvTimingResp()

◆ recvTimingSnoopReq()

◆ sendStoreToStoreBuffer()

◆ step()

◆ threadSnoop()

◆ tryToSend()

◆ tryToSendToTransfers()

Friends And Related Symbol Documentation

◆ operator<< [1/3]

◆ operator<< [2/3]

◆ operator<< [3/3]

Member Data Documentation

◆ cacheBlockMask

◆ cpu

◆ dcachePort

◆ execute

◆ inMemorySystemLimit

◆ lastMemBarrier

◆ lineWidth

◆ numAccessesInDTLB

◆ numAccessesInMemorySystem

◆ numAccessesIssuedToMemory

◆ numStoresInTransfers

◆ requests

◆ retryRequest

◆ state

◆ storeBuffer

◆ transfers