gem5 v24.0.0.0
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The GPUCommandProcessor (CP) is responsible for accepting commands, in the form of HSA AQL packets, from the HSA packet processor (HSAPP). More...
#include <cstdint>
#include <functional>
#include "arch/amdgpu/vega/gpu_registers.hh"
#include "base/logging.hh"
#include "base/trace.hh"
#include "base/types.hh"
#include "debug/GPUCommandProc.hh"
#include "dev/dma_virt_device.hh"
#include "dev/hsa/hsa_packet_processor.hh"
#include "dev/hsa/hsa_signal.hh"
#include "gpu-compute/dispatcher.hh"
#include "gpu-compute/gpu_compute_driver.hh"
#include "gpu-compute/hsa_queue_entry.hh"
#include "params/GPUCommandProcessor.hh"
#include "sim/full_system.hh"
Go to the source code of this file.
Classes | |
class | gem5::GPUCommandProcessor |
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
The GPUCommandProcessor (CP) is responsible for accepting commands, in the form of HSA AQL packets, from the HSA packet processor (HSAPP).
The CP works with several components, including the HSAPP and the dispatcher. When the HSAPP sends a ready task to the CP, it will perform the necessary operations to extract relevant data structures from memory, such as the AQL queue descriptor and AQL packet, and initializes register state for the task's wavefronts.
Definition in file gpu_command_processor.hh.