gem5  v21.1.0.2
dispatcher.hh
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33 
43 #ifndef __GPU_COMPUTE_DISPATCHER_HH__
44 #define __GPU_COMPUTE_DISPATCHER_HH__
45 
46 #include <queue>
47 #include <unordered_map>
48 #include <vector>
49 
50 #include "base/statistics.hh"
51 #include "base/stats/group.hh"
52 #include "dev/hsa/hsa_packet.hh"
53 #include "params/GPUDispatcher.hh"
54 #include "sim/sim_object.hh"
55 
56 namespace gem5
57 {
58 
59 class GPUCommandProcessor;
60 class HSAQueueEntry;
61 class Shader;
62 class Wavefront;
63 
64 class GPUDispatcher : public SimObject
65 {
66  public:
67  typedef GPUDispatcherParams Params;
68 
69  GPUDispatcher(const Params &p);
71 
72  void serialize(CheckpointOut &cp) const override;
73  void unserialize(CheckpointIn &cp) override;
74  void setCommandProcessor(GPUCommandProcessor *gpu_cmd_proc);
75  void setShader(Shader *new_shader);
76  void exec();
78  void updateInvCounter(int kern_id, int val=-1);
79  bool updateWbCounter(int kern_id, int val=-1);
80  int getOutstandingWbs(int kern_id);
81  void notifyWgCompl(Wavefront *wf);
82  void scheduleDispatch();
83  void dispatch(HSAQueueEntry *task);
84  HSAQueueEntry* hsaTask(int disp_id);
85 
86  private:
90  std::unordered_map<int, HSAQueueEntry*> hsaQueueEntries;
91  // list of kernel_ids to launch
92  std::queue<int> execIds;
93  // list of kernel_ids that have finished
94  std::queue<int> doneIds;
95  // is there a kernel in execution?
97 
98  protected:
100  {
102 
105  } stats;
106 };
107 
108 } // namespace gem5
109 
110 #endif // __GPU_COMPUTE_DISPATCHER_HH__
gem5::statistics::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:1927
gem5::GPUDispatcher::execIds
std::queue< int > execIds
Definition: dispatcher.hh:92
gem5::GPUDispatcher::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: dispatcher.cc:84
group.hh
gem5::GPUDispatcher::~GPUDispatcher
~GPUDispatcher()
Definition: dispatcher.cc:60
gem5::Wavefront
Definition: wavefront.hh:62
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::HSAQueueEntry
Definition: hsa_queue_entry.hh:61
gem5::GPUDispatcher::gpuCmdProc
GPUCommandProcessor * gpuCmdProc
Definition: dispatcher.hh:88
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::GPUDispatcher::hsaTask
HSAQueueEntry * hsaTask(int disp_id)
Definition: dispatcher.cc:65
gem5::GPUDispatcher::shader
Shader * shader
Definition: dispatcher.hh:87
gem5::GPUDispatcher::getOutstandingWbs
int getOutstandingWbs(int kern_id)
get kernel's outstanding cache writeback requests
Definition: dispatcher.cc:282
gem5::GPUDispatcher::isReachingKernelEnd
bool isReachingKernelEnd(Wavefront *wf)
Definition: dispatcher.cc:228
gem5::GPUDispatcher::updateWbCounter
bool updateWbCounter(int kern_id, int val=-1)
update the counter of oustanding wb requests for the kernel kern_id: kernel id val: +1/-1,...
Definition: dispatcher.cc:268
gem5::GPUDispatcher::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: dispatcher.cc:95
gem5::GPUDispatcher::dispatch
void dispatch(HSAQueueEntry *task)
After all relevant HSA data structures have been traversed/extracted from memory by the CP,...
Definition: dispatcher.cc:116
gem5::GPUCommandProcessor
Definition: gpu_command_processor.hh:71
sim_object.hh
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
statistics.hh
gem5::GPUDispatcher::hsaQueueEntries
std::unordered_map< int, HSAQueueEntry * > hsaQueueEntries
Definition: dispatcher.hh:90
hsa_packet.hh
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::GPUDispatcher::setCommandProcessor
void setCommandProcessor(GPUCommandProcessor *gpu_cmd_proc)
Definition: dispatcher.cc:72
gem5::GPUDispatcher::GPUDispatcherStats::cyclesWaitingForDispatch
statistics::Scalar cyclesWaitingForDispatch
Definition: dispatcher.hh:104
gem5::GPUDispatcher::GPUDispatcherStats
Definition: dispatcher.hh:99
gem5::GPUDispatcher::notifyWgCompl
void notifyWgCompl(Wavefront *wf)
When an end program instruction detects that the last WF in a WG has completed it will call this meth...
Definition: dispatcher.cc:297
gem5::EventFunctionWrapper
Definition: eventq.hh:1115
gem5::GPUDispatcher::stats
gem5::GPUDispatcher::GPUDispatcherStats stats
gem5::GPUDispatcher::Params
GPUDispatcherParams Params
Definition: dispatcher.hh:67
gem5::GPUDispatcher::GPUDispatcherStats::GPUDispatcherStats
GPUDispatcherStats(statistics::Group *parent)
Definition: dispatcher.cc:350
gem5::GPUDispatcher::setShader
void setShader(Shader *new_shader)
Definition: dispatcher.cc:78
gem5::GPUDispatcher::GPUDispatcher
GPUDispatcher(const Params &p)
Definition: dispatcher.cc:51
gem5::GPUDispatcher::updateInvCounter
void updateInvCounter(int kern_id, int val=-1)
update the counter of oustanding inv requests for the kernel kern_id: kernel id val: +1/-1,...
Definition: dispatcher.cc:248
gem5::GPUDispatcher::exec
void exec()
Definition: dispatcher.cc:135
gem5::GPUDispatcher::tickEvent
EventFunctionWrapper tickEvent
Definition: dispatcher.hh:89
gem5::statistics::Group
Statistics container.
Definition: group.hh:93
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::GPUDispatcher
Definition: dispatcher.hh:64
gem5::GPUDispatcher::scheduleDispatch
void scheduleDispatch()
Definition: dispatcher.cc:343
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::GPUDispatcher::GPUDispatcherStats::numKernelLaunched
statistics::Scalar numKernelLaunched
Definition: dispatcher.hh:103
gem5::GPUDispatcher::dispatchActive
bool dispatchActive
Definition: dispatcher.hh:96
gem5::GPUDispatcher::doneIds
std::queue< int > doneIds
Definition: dispatcher.hh:94
gem5::Shader
Definition: shader.hh:84

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