gem5  v21.2.1.1
dispatcher.hh
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31 
41 #ifndef __GPU_COMPUTE_DISPATCHER_HH__
42 #define __GPU_COMPUTE_DISPATCHER_HH__
43 
44 #include <queue>
45 #include <unordered_map>
46 #include <vector>
47 
48 #include "base/statistics.hh"
49 #include "base/stats/group.hh"
50 #include "dev/hsa/hsa_packet.hh"
51 #include "params/GPUDispatcher.hh"
52 #include "sim/sim_object.hh"
53 
54 namespace gem5
55 {
56 
57 class GPUCommandProcessor;
58 class HSAQueueEntry;
59 class Shader;
60 class Wavefront;
61 
62 class GPUDispatcher : public SimObject
63 {
64  public:
65  typedef GPUDispatcherParams Params;
66 
67  GPUDispatcher(const Params &p);
69 
70  void serialize(CheckpointOut &cp) const override;
71  void unserialize(CheckpointIn &cp) override;
72  void setCommandProcessor(GPUCommandProcessor *gpu_cmd_proc);
73  void setShader(Shader *new_shader);
74  void exec();
76  void updateInvCounter(int kern_id, int val=-1);
77  bool updateWbCounter(int kern_id, int val=-1);
78  int getOutstandingWbs(int kern_id);
79  void notifyWgCompl(Wavefront *wf);
80  void scheduleDispatch();
81  void dispatch(HSAQueueEntry *task);
82  HSAQueueEntry* hsaTask(int disp_id);
83 
84  private:
88  std::unordered_map<int, HSAQueueEntry*> hsaQueueEntries;
89  // list of kernel_ids to launch
90  std::queue<int> execIds;
91  // list of kernel_ids that have finished
92  std::queue<int> doneIds;
93  // is there a kernel in execution?
95 
96  protected:
98  {
100 
103  } stats;
104 };
105 
106 } // namespace gem5
107 
108 #endif // __GPU_COMPUTE_DISPATCHER_HH__
gem5::statistics::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:1930
gem5::GPUDispatcher::execIds
std::queue< int > execIds
Definition: dispatcher.hh:90
gem5::GPUDispatcher::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: dispatcher.cc:82
group.hh
gem5::GPUDispatcher::~GPUDispatcher
~GPUDispatcher()
Definition: dispatcher.cc:58
gem5::Wavefront
Definition: wavefront.hh:60
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::HSAQueueEntry
Definition: hsa_queue_entry.hh:59
gem5::GPUDispatcher::gpuCmdProc
GPUCommandProcessor * gpuCmdProc
Definition: dispatcher.hh:86
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::GPUDispatcher::hsaTask
HSAQueueEntry * hsaTask(int disp_id)
Definition: dispatcher.cc:63
gem5::GPUDispatcher::shader
Shader * shader
Definition: dispatcher.hh:85
gem5::GPUDispatcher::getOutstandingWbs
int getOutstandingWbs(int kern_id)
get kernel's outstanding cache writeback requests
Definition: dispatcher.cc:280
gem5::GPUDispatcher::isReachingKernelEnd
bool isReachingKernelEnd(Wavefront *wf)
Definition: dispatcher.cc:226
gem5::GPUDispatcher::updateWbCounter
bool updateWbCounter(int kern_id, int val=-1)
update the counter of oustanding wb requests for the kernel kern_id: kernel id val: +1/-1,...
Definition: dispatcher.cc:266
gem5::GPUDispatcher::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: dispatcher.cc:93
gem5::GPUDispatcher::dispatch
void dispatch(HSAQueueEntry *task)
After all relevant HSA data structures have been traversed/extracted from memory by the CP,...
Definition: dispatcher.cc:114
gem5::GPUCommandProcessor
Definition: gpu_command_processor.hh:69
sim_object.hh
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
statistics.hh
gem5::GPUDispatcher::hsaQueueEntries
std::unordered_map< int, HSAQueueEntry * > hsaQueueEntries
Definition: dispatcher.hh:88
hsa_packet.hh
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::GPUDispatcher::setCommandProcessor
void setCommandProcessor(GPUCommandProcessor *gpu_cmd_proc)
Definition: dispatcher.cc:70
gem5::GPUDispatcher::GPUDispatcherStats::cyclesWaitingForDispatch
statistics::Scalar cyclesWaitingForDispatch
Definition: dispatcher.hh:102
gem5::GPUDispatcher::GPUDispatcherStats
Definition: dispatcher.hh:97
gem5::GPUDispatcher::notifyWgCompl
void notifyWgCompl(Wavefront *wf)
When an end program instruction detects that the last WF in a WG has completed it will call this meth...
Definition: dispatcher.cc:295
gem5::EventFunctionWrapper
Definition: eventq.hh:1115
gem5::GPUDispatcher::stats
gem5::GPUDispatcher::GPUDispatcherStats stats
gem5::GPUDispatcher::Params
GPUDispatcherParams Params
Definition: dispatcher.hh:65
gem5::GPUDispatcher::GPUDispatcherStats::GPUDispatcherStats
GPUDispatcherStats(statistics::Group *parent)
Definition: dispatcher.cc:348
gem5::GPUDispatcher::setShader
void setShader(Shader *new_shader)
Definition: dispatcher.cc:76
gem5::GPUDispatcher::GPUDispatcher
GPUDispatcher(const Params &p)
Definition: dispatcher.cc:49
gem5::GPUDispatcher::updateInvCounter
void updateInvCounter(int kern_id, int val=-1)
update the counter of oustanding inv requests for the kernel kern_id: kernel id val: +1/-1,...
Definition: dispatcher.cc:246
gem5::GPUDispatcher::exec
void exec()
Definition: dispatcher.cc:133
gem5::GPUDispatcher::tickEvent
EventFunctionWrapper tickEvent
Definition: dispatcher.hh:87
gem5::statistics::Group
Statistics container.
Definition: group.hh:93
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::GPUDispatcher
Definition: dispatcher.hh:62
gem5::GPUDispatcher::scheduleDispatch
void scheduleDispatch()
Definition: dispatcher.cc:341
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60
gem5::GPUDispatcher::GPUDispatcherStats::numKernelLaunched
statistics::Scalar numKernelLaunched
Definition: dispatcher.hh:101
gem5::GPUDispatcher::dispatchActive
bool dispatchActive
Definition: dispatcher.hh:94
gem5::GPUDispatcher::doneIds
std::queue< int > doneIds
Definition: dispatcher.hh:92
gem5::Shader
Definition: shader.hh:82

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