gem5 v24.0.0.0
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microdebug.hh
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1/*
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26 */
27
28#ifndef __ARCH_X86_INSTS_MICRODEBUG_HH__
29#define __ARCH_X86_INSTS_MICRODEBUG_HH__
30
32
33namespace gem5
34{
35
36namespace X86ISA
37{
38
40{
41 protected:
42 std::shared_ptr<GenericISA::M5DebugFault> fault;
43
44 public:
45 MicroDebug(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem,
46 uint64_t set_flags, GenericISA::M5DebugFault *_fault) :
47 X86MicroopBase(mach_inst, mnem, inst_mnem, set_flags, No_OpClass),
48 fault(_fault)
49 {}
50
51 Fault
52 execute(ExecContext *xc, trace::InstRecord *traceData) const override
53 {
54 return fault;
55 }
56
57 std::string
59 const loader::SymbolTable *symtab) const override
60 {
61 std::stringstream response;
62
64 response << "\"" << fault->message() << "\"";
65
66 return response.str();
67 }
68};
69
70} // namespace X86ISA
71} // namespace gem5
72
73#endif //__ARCH_X86_INSTS_MICRODEBUG_HH__
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
const char * mnemonic
Base mnemonic (e.g., "add").
Fault execute(ExecContext *xc, trace::InstRecord *traceData) const override
Definition microdebug.hh:52
std::shared_ptr< GenericISA::M5DebugFault > fault
Definition microdebug.hh:42
MicroDebug(ExtMachInst mach_inst, const char *mnem, const char *inst_mnem, uint64_t set_flags, GenericISA::M5DebugFault *_fault)
Definition microdebug.hh:45
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition microdebug.hh:58
static void printMnemonic(std::ostream &os, const char *mnemonic)
Bitfield< 19 > pc
Definition misc.hh:840
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
std::shared_ptr< FaultBase > Fault
Definition types.hh:249
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147

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