#include <microdebug.hh>

Inheritance diagram for gem5::X86ISA::MicroDebug:

Public Member Functions
	MicroDebug (ExtMachInst mach_inst, const char mnem, const char inst_mnem, uint64_t set_flags, GenericISA::M5DebugFault *_fault)

Fault	execute (ExecContext xc, trace::InstRecord traceData) const override

std::string	generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override
	Internal function to generate disassembly string.

Public Member Functions inherited from gem5::StaticInst
uint8_t	numSrcRegs () const
	Number of source registers.

uint8_t	numDestRegs () const
	Number of destination registers.

uint8_t	numDestRegs (RegClassType type) const
	Number of destination registers of a particular type.

bool	isNop () const

bool	isMemRef () const

bool	isLoad () const

bool	isStore () const

bool	isAtomic () const

bool	isStoreConditional () const

bool	isInstPrefetch () const

bool	isDataPrefetch () const

bool	isPrefetch () const

bool	isInteger () const

bool	isFloating () const

bool	isVector () const

bool	isMatrix () const

bool	isControl () const

bool	isCall () const

bool	isReturn () const

bool	isDirectCtrl () const

bool	isIndirectCtrl () const

bool	isCondCtrl () const

bool	isUncondCtrl () const

bool	isSerializing () const

bool	isSerializeBefore () const

bool	isSerializeAfter () const

bool	isSquashAfter () const

bool	isFullMemBarrier () const

bool	isReadBarrier () const

bool	isWriteBarrier () const

bool	isNonSpeculative () const

bool	isQuiesce () const

bool	isUnverifiable () const

bool	isPseudo () const

bool	isSyscall () const

bool	isMacroop () const

bool	isMicroop () const

bool	isDelayedCommit () const

bool	isLastMicroop () const

bool	isFirstMicroop () const

bool	isHtmStart () const

bool	isHtmStop () const

bool	isHtmCancel () const

bool	isInvalid () const

bool	isHtmCmd () const

void	setFirstMicroop ()

void	setLastMicroop ()

void	setDelayedCommit ()

void	setFlag (Flags f)

OpClass	opClass () const
	Operation class. Used to select appropriate function unit in issue.

const RegId &	destRegIdx (int i) const
	Return logical index (architectural reg num) of i'th destination reg.

void	setDestRegIdx (int i, const RegId &val)

const RegId &	srcRegIdx (int i) const
	Return logical index (architectural reg num) of i'th source reg.

void	setSrcRegIdx (int i, const RegId &val)

virtual uint64_t	getEMI () const

virtual	~StaticInst ()

virtual Fault	initiateAcc (ExecContext xc, trace::InstRecord traceData) const

virtual Fault	completeAcc (Packet pkt, ExecContext xc, trace::InstRecord *trace_data) const

size_t	size () const

virtual void	size (size_t newSize)

virtual StaticInstPtr	fetchMicroop (MicroPC upc) const
	Return the microop that goes with a particular micropc.

virtual const std::string &	disassemble (Addr pc, const loader::SymbolTable *symtab=nullptr) const
	Return string representation of disassembled instruction.

void	printFlags (std::ostream &outs, const std::string &separator) const
	Print a separator separated list of this instruction's set flag names on the given stream.

std::string	getName ()
	Return name of machine instruction.

virtual size_t	asBytes (void *buf, size_t max_size)
	Instruction classes can override this function to return a a representation of themselves as a blob of bytes, generally assumed to be that instructions ExtMachInst.

Public Member Functions inherited from gem5::RefCounted
	RefCounted ()
	We initialize the reference count to zero and the first object to take ownership of it must increment it to one.

virtual	~RefCounted ()
	We make the destructor virtual because we're likely to have virtual functions on reference counted objects.

void	incref () const
	Increment the reference count.

void	decref () const
	Decrement the reference count and destroy the object if all references are gone.

Protected Attributes
std::shared_ptr< GenericISA::M5DebugFault >	fault

Protected Attributes inherited from gem5::X86ISA::X86MicroopBase
const char *	instMnem

uint8_t	opSize

uint8_t	addrSize

Protected Attributes inherited from gem5::StaticInst
std::bitset< Num_Flags >	flags
	Flag values for this instruction.

OpClass	_opClass
	See opClass().

uint8_t	_numSrcRegs = 0
	See numSrcRegs().

uint8_t	_numDestRegs = 0
	See numDestRegs().

std::array< uint8_t, MiscRegClass+1 >	_numTypedDestRegs = {}

size_t	_size = 0
	Instruction size in bytes.

const char *	mnemonic
	Base mnemonic (e.g., "add").

std::unique_ptr< std::string >	cachedDisassembly
	String representation of disassembly (lazily evaluated via disassemble()).

Additional Inherited Members
Public Types inherited from gem5::StaticInst
using	RegIdArrayPtr = RegId (StaticInst:: *)[]

Static Public Member Functions inherited from gem5::X86ISA::X86StaticInst
static void	printMnemonic (std::ostream &os, const char *mnemonic)

static void	printMnemonic (std::ostream &os, const char instMnemonic, const char mnemonic)

static void	printMem (std::ostream &os, uint8_t segment, uint8_t scale, RegIndex index, RegIndex base, uint64_t disp, uint8_t addressSize, bool rip)

static void	printSegment (std::ostream &os, int segment)

static void	printReg (std::ostream &os, RegId reg, int size)

Public Attributes inherited from gem5::X86ISA::X86StaticInst
ExtMachInst	machInst

Static Public Attributes inherited from gem5::StaticInst
static StaticInstPtr	nullStaticInstPtr
	Pointer to a statically allocated "null" instruction object.

Protected Types inherited from gem5::X86ISA::X86StaticInst
using	ExtMachInst = X86ISA::ExtMachInst

Protected Member Functions inherited from gem5::X86ISA::X86MicroopBase
	X86MicroopBase (ExtMachInst _machInst, const char mnem, const char _instMnem, uint64_t setFlags, OpClass __opClass)

std::string	generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override
	Internal function to generate disassembly string.

bool	checkCondition (uint64_t flags, int condition) const

void	advancePC (PCStateBase &pcState) const override

void	advancePC (ThreadContext *tc) const override

std::unique_ptr< PCStateBase >	branchTarget (const PCStateBase &branch_pc) const override
	Return the target address for a PC-relative branch.

virtual std::unique_ptr< PCStateBase >	branchTarget (ThreadContext *tc) const
	Return the target address for an indirect branch (jump).

Protected Member Functions inherited from gem5::X86ISA::X86StaticInst
	X86StaticInst (const char *mnem, ExtMachInst _machInst, OpClass __opClass)

std::string	generateDisassembly (Addr pc, const loader::SymbolTable *symtab) const override
	Internal function to generate disassembly string.

void	advancePC (PCStateBase &pcState) const override

void	advancePC (ThreadContext *tc) const override

std::unique_ptr< PCStateBase >	buildRetPC (const PCStateBase &cur_pc, const PCStateBase &call_pc) const override

Protected Member Functions inherited from gem5::StaticInst
void	setRegIdxArrays (RegIdArrayPtr src, RegIdArrayPtr dest)
	Set the pointers which point to the arrays of source and destination register indices.

	StaticInst (const char *_mnemonic, OpClass op_class)
	Constructor.

template<typename T >
size_t	simpleAsBytes (void *buf, size_t max_size, const T &t)

Static Protected Member Functions inherited from gem5::X86ISA::X86StaticInst
static void	divideStep (uint64_t divident, uint64_t divisor, uint64_t &quotient, uint64_t &remainder)

static uint64_t	merge (uint64_t into, RegIndex index, uint64_t val, int size)

static uint64_t	pick (uint64_t from, RegIndex index, int size)

static int64_t	signedPick (uint64_t from, RegIndex index, int size)

Detailed Description

Definition at line 39 of file microdebug.hh.

Constructor & Destructor Documentation

◆ MicroDebug()

gem5::X86ISA::MicroDebug::MicroDebug	(	ExtMachInst	mach_inst,
		const char *	mnem,
		const char *	inst_mnem,
		uint64_t	set_flags,
		GenericISA::M5DebugFault *	_fault )

inline

Definition at line 45 of file microdebug.hh.

Member Function Documentation

◆ execute()

Fault gem5::X86ISA::MicroDebug::execute	(	ExecContext *	xc,
		trace::InstRecord *	traceData ) const

inlineoverridevirtual

Implements gem5::StaticInst.

Definition at line 52 of file microdebug.hh.

References fault.

◆ generateDisassembly()

std::string gem5::X86ISA::MicroDebug::generateDisassembly	(	Addr	pc,
		const loader::SymbolTable *	symtab ) const

inlineoverridevirtual

Internal function to generate disassembly string.

Implements gem5::StaticInst.

Definition at line 58 of file microdebug.hh.

References fault, gem5::X86ISA::X86MicroopBase::instMnem, gem5::StaticInst::mnemonic, and gem5::X86ISA::X86StaticInst::printMnemonic().

Member Data Documentation

◆ fault

std::shared_ptr<GenericISA::M5DebugFault> gem5::X86ISA::MicroDebug::fault

protected

Definition at line 42 of file microdebug.hh.

Referenced by execute(), and generateDisassembly().

The documentation for this class was generated from the following file:

arch/x86/insts/microdebug.hh

Public Member Functions

Protected Attributes

Additional Inherited Members