gem5  v21.2.0.0
scalar_memory_pipeline.hh
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31 
32 #ifndef __GPU_COMPUTE_SCALAR_MEMORY_PIPELINE_HH__
33 #define __GPU_COMPUTE_SCALAR_MEMORY_PIPELINE_HH__
34 
35 #include <queue>
36 #include <string>
37 
38 #include "gpu-compute/misc.hh"
39 #include "params/ComputeUnit.hh"
40 #include "sim/stats.hh"
41 
42 /*
43  * @file scalar_memory_pipeline.hh
44  *
45  * The scalar memory pipeline issues global memory packets
46  * from the scalar ALU to the DTLB and L1 Scalar Data Cache.
47  * The exec() method of the memory packet issues
48  * the packet to the DTLB if there is space available in the return fifo.
49  * This exec() method also retires previously issued loads and stores that have
50  * returned from the memory sub-system.
51  */
52 
53 namespace gem5
54 {
55 
56 class ComputeUnit;
57 
59 {
60  public:
61  ScalarMemPipeline(const ComputeUnitParams &p, ComputeUnit &cu);
62  void exec();
63 
64  std::queue<GPUDynInstPtr> &getGMReqFIFO() { return issuedRequests; }
65  std::queue<GPUDynInstPtr> &getGMStRespFIFO() { return returnedStores; }
66  std::queue<GPUDynInstPtr> &getGMLdRespFIFO() { return returnedLoads; }
67 
68  void issueRequest(GPUDynInstPtr gpuDynInst);
69 
70  bool
72  {
73  return returnedLoads.size() < queueSize;
74  }
75 
76  bool
78  {
79  return returnedStores.size() < queueSize;
80  }
81 
82  bool
83  isGMReqFIFOWrRdy(uint32_t pendReqs=0) const
84  {
85  return (issuedRequests.size() + pendReqs) < queueSize;
86  }
87 
88  const std::string& name() const { return _name; }
89 
90  private:
92  const std::string _name;
93  int queueSize;
94 
95  // Counters to track and limit the inflight scalar loads and stores
96  // generated by this memory pipeline.
99 
100  // Scalar Memory Request FIFO: all global memory scalar requests
101  // are issued to this FIFO from the scalar memory pipelines
102  std::queue<GPUDynInstPtr> issuedRequests;
103 
104  // Scalar Store Response FIFO: all responses of global memory
105  // scalar stores are sent to this FIFO from L1 Scalar Data Cache
106  std::queue<GPUDynInstPtr> returnedStores;
107 
108  // Scalar Load Response FIFO: all responses of global memory
109  // scalar loads are sent to this FIFO from L1 Scalar Data Cache
110  std::queue<GPUDynInstPtr> returnedLoads;
111 };
112 
113 } // namespace gem5
114 
115 #endif // __GPU_COMPUTE_SCALAR_MEMORY_PIPELINE_HH__
gem5::ScalarMemPipeline::returnedStores
std::queue< GPUDynInstPtr > returnedStores
Definition: scalar_memory_pipeline.hh:106
gem5::ScalarMemPipeline::issuedRequests
std::queue< GPUDynInstPtr > issuedRequests
Definition: scalar_memory_pipeline.hh:102
gem5::ScalarMemPipeline::exec
void exec()
Definition: scalar_memory_pipeline.cc:54
gem5::ScalarMemPipeline::getGMStRespFIFO
std::queue< GPUDynInstPtr > & getGMStRespFIFO()
Definition: scalar_memory_pipeline.hh:65
gem5::ScalarMemPipeline::isGMReqFIFOWrRdy
bool isGMReqFIFOWrRdy(uint32_t pendReqs=0) const
Definition: scalar_memory_pipeline.hh:83
misc.hh
gem5::ScalarMemPipeline::queueSize
int queueSize
Definition: scalar_memory_pipeline.hh:93
gem5::ScalarMemPipeline::name
const std::string & name() const
Definition: scalar_memory_pipeline.hh:88
gem5::ScalarMemPipeline::getGMLdRespFIFO
std::queue< GPUDynInstPtr > & getGMLdRespFIFO()
Definition: scalar_memory_pipeline.hh:66
stats.hh
gem5::ComputeUnit
Definition: compute_unit.hh:201
gem5::ScalarMemPipeline
Definition: scalar_memory_pipeline.hh:58
gem5::ScalarMemPipeline::isGMLdRespFIFOWrRdy
bool isGMLdRespFIFOWrRdy() const
Definition: scalar_memory_pipeline.hh:71
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::ScalarMemPipeline::issueRequest
void issueRequest(GPUDynInstPtr gpuDynInst)
Definition: scalar_memory_pipeline.cc:146
gem5::ScalarMemPipeline::computeUnit
ComputeUnit & computeUnit
Definition: scalar_memory_pipeline.hh:91
gem5::ScalarMemPipeline::inflightStores
int inflightStores
Definition: scalar_memory_pipeline.hh:97
gem5::GPUDynInstPtr
std::shared_ptr< GPUDynInst > GPUDynInstPtr
Definition: misc.hh:49
gem5::ScalarMemPipeline::isGMStRespFIFOWrRdy
bool isGMStRespFIFOWrRdy() const
Definition: scalar_memory_pipeline.hh:77
gem5::ScalarMemPipeline::returnedLoads
std::queue< GPUDynInstPtr > returnedLoads
Definition: scalar_memory_pipeline.hh:110
gem5::ScalarMemPipeline::_name
const std::string _name
Definition: scalar_memory_pipeline.hh:92
gem5::ScalarMemPipeline::getGMReqFIFO
std::queue< GPUDynInstPtr > & getGMReqFIFO()
Definition: scalar_memory_pipeline.hh:64
gem5::ScalarMemPipeline::inflightLoads
int inflightLoads
Definition: scalar_memory_pipeline.hh:98
gem5::ScalarMemPipeline::ScalarMemPipeline
ScalarMemPipeline(const ComputeUnitParams &p, ComputeUnit &cu)
Definition: scalar_memory_pipeline.cc:45
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: tlb.cc:60

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