A stage responsible for fetching "lines" from memory and passing them to Fetch2. More...

#include <fetch1.hh>

Inheritance diagram for Minor::Fetch1:

Classes
struct	Fetch1ThreadInfo
	Stage cycle-by-cycle state. More...

class	FetchRequest
	Memory access queuing. More...

class	IcachePort
	Exposable fetch port. More...

Public Member Functions
	Fetch1 (const std::string &name_, MinorCPU &cpu_, MinorCPUParams &params, Latch< BranchData >::Output inp_, Latch< ForwardLineData >::Input out_, Latch< BranchData >::Output prediction_, std::vector< InputBuffer< ForwardLineData >> &next_stage_input_buffer)

MinorCPU::MinorCPUPort &	getIcachePort ()
	Returns the IcachePort owned by this Fetch1. More...

void	evaluate ()
	Pass on input/buffer data to the output if you can. More...

void	wakeupFetch (ThreadID tid)
	Initiate fetch1 fetching. More...

void	minorTrace () const

bool	isDrained ()
	Is this stage drained? For Fetch1, draining is initiated by Execute signalling a branch with the reason HaltFetch. More...

Public Member Functions inherited from Named
	Named (const std::string &name_)

const std::string &	name () const

Protected Types
enum	FetchState { FetchHalted, FetchWaitingForPC, FetchRunning }
	Cycle-by-cycle state. More...

enum	IcacheState { IcacheRunning, IcacheNeedsRetry }
	State of memory access for head instruction fetch. More...

typedef FetchRequest *	FetchRequestPtr

typedef Queue< FetchRequestPtr, ReportTraitsPtrAdaptor< FetchRequestPtr >, NoBubbleTraits< FetchRequestPtr > >	FetchQueue

Protected Member Functions
void	changeStream (const BranchData &branch)
	Start fetching from a new address. More...

void	updateExpectedSeqNums (const BranchData &branch)
	Update streamSeqNum and predictionSeqNum from the given branch (and assume these have changed and discard (on delivery) all lines in flight) More...

void	processResponse (FetchRequestPtr response, ForwardLineData &line)
	Convert a response to a ForwardLineData. More...

ThreadID	getScheduledThread ()
	Use the current threading policy to determine the next thread to fetch from. More...

void	fetchLine (ThreadID tid)
	Insert a line fetch into the requests. More...

void	tryToSendToTransfers (FetchRequestPtr request)
	Try and issue a fetch for a translated request at the head of the requests queue. More...

bool	tryToSend (FetchRequestPtr request)
	Try to send (or resend) a memory request's next/only packet to the memory system. More...

void	moveFromRequestsToTransfers (FetchRequestPtr request)
	Move a request between queues. More...

void	stepQueues ()
	Step requests along between requests and transfers queues. More...

void	popAndDiscard (FetchQueue &queue)
	Pop a request from the given queue and correctly deallocate and discard it. More...

void	handleTLBResponse (FetchRequestPtr response)
	Handle pushing a TLB response onto the right queue. More...

unsigned int	numInFlightFetches ()
	Returns the total number of queue occupancy, in-ITLB and in-memory system fetches. More...

void	minorTraceResponseLine (const std::string &name, FetchRequestPtr response) const
	Print the appropriate MinorLine line for a fetch response. More...

virtual bool	recvTimingResp (PacketPtr pkt)
	Memory interface. More...

virtual void	recvReqRetry ()

Protected Attributes
MinorCPU &	cpu
	Construction-assigned data members. More...

Latch< BranchData >::Output	inp
	Input port carrying branch requests from Execute. More...

Latch< ForwardLineData >::Input	out
	Output port carrying read lines to Fetch2. More...

Latch< BranchData >::Output	prediction
	Input port carrying branch predictions from Fetch2. More...

std::vector< InputBuffer< ForwardLineData > > &	nextStageReserve
	Interface to reserve space in the next stage. More...

IcachePort	icachePort
	IcachePort to pass to the CPU. More...

unsigned int	lineSnap
	Line snap size in bytes. More...

unsigned int	maxLineWidth
	Maximum fetch width in bytes. More...

unsigned int	fetchLimit
	Maximum number of fetches allowed in flight (in queues or memory) More...

std::vector< Fetch1ThreadInfo >	fetchInfo

ThreadID	threadPriority

FetchQueue	requests
	Queue of address translated requests from Fetch1. More...

FetchQueue	transfers
	Queue of in-memory system requests and responses. More...

IcacheState	icacheState
	Retry state of icache_port. More...

InstSeqNum	lineSeqNum
	Sequence number for line fetch used for ordering lines to flush. More...

unsigned int	numFetchesInMemorySystem
	Count of the number fetches which have left the transfers queue and are in the 'wild' in the memory system. More...

unsigned int	numFetchesInITLB
	Number of requests inside the ITLB rather than in the queues. More...

Protected Attributes inherited from Named
const std::string	_name

Friends
std::ostream &	operator<< (std::ostream &os, Fetch1::FetchState state)

std::ostream &	operator<< (std::ostream &os, IcacheState state)

Detailed Description

A stage responsible for fetching "lines" from memory and passing them to Fetch2.

Definition at line 61 of file fetch1.hh.

Member Typedef Documentation

◆ FetchQueue

typedef Queue<FetchRequestPtr, ReportTraitsPtrAdaptor<FetchRequestPtr>, NoBubbleTraits<FetchRequestPtr> > Minor::Fetch1::FetchQueue

protected

Definition at line 296 of file fetch1.hh.

◆ FetchRequestPtr

typedef FetchRequest* Minor::Fetch1::FetchRequestPtr

protected

Definition at line 186 of file fetch1.hh.

Member Enumeration Documentation

◆ FetchState

enum Minor::Fetch1::FetchState

protected

Cycle-by-cycle state.

State of memory access for head instruction fetch

Enumerator
FetchHalted
FetchWaitingForPC
FetchRunning

Definition at line 226 of file fetch1.hh.

◆ IcacheState

enum Minor::Fetch1::IcacheState

protected

State of memory access for head instruction fetch.

Enumerator
IcacheRunning
IcacheNeedsRetry

Definition at line 287 of file fetch1.hh.

Constructor & Destructor Documentation

◆ Fetch1()

Minor::Fetch1::Fetch1	(	const std::string &	name_,
		MinorCPU &	cpu_,
		MinorCPUParams &	params,
		Latch< BranchData >::Output	inp_,
		Latch< ForwardLineData >::Input	out_,
		Latch< BranchData >::Output	prediction_,
		std::vector< InputBuffer< ForwardLineData >> &	next_stage_input_buffer
	)

Definition at line 55 of file fetch1.cc.

References BaseCPU::cacheLineSize(), cpu, DPRINTF, fatal, fetchLimit, lineSnap, and maxLineWidth.

Member Function Documentation

◆ changeStream()

void Minor::Fetch1::changeStream ( const BranchData & branch )

protected

Start fetching from a new address.

Definition at line 489 of file fetch1.cc.

References DPRINTF, FetchHalted, fetchInfo, FetchRunning, FetchWaitingForPC, Minor::BranchData::HaltFetch, Minor::Fetch1::Fetch1ThreadInfo::pc, Minor::BranchData::reason, Minor::Fetch1::Fetch1ThreadInfo::state, Minor::BranchData::SuspendThread, Minor::BranchData::target, Minor::BranchData::threadId, updateExpectedSeqNums(), and Minor::Fetch1::Fetch1ThreadInfo::wakeupGuard.

Referenced by evaluate().

◆ evaluate()

void Minor::Fetch1::evaluate ( )

Pass on input/buffer data to the output if you can.

Are both branches from later stages valid and for the same thread?

Definition at line 573 of file fetch1.cc.

References ActivityRecorder::activity(), MinorCPU::activityRecorder, changeStream(), cpu, DPRINTF, Minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), Minor::Pipeline::Fetch1StageId, FetchHalted, fetchInfo, fetchLimit, fetchLine(), Minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), getScheduledThread(), Minor::Fetch1::FetchRequest::id, inp, InvalidThreadID, Minor::BranchData::isBubble(), Minor::ForwardLineData::isBubble(), Minor::Fetch1::FetchRequest::isComplete(), Minor::Fetch1::FetchRequest::isDiscardable(), Minor::BranchData::isStreamChange(), Minor::BranchData::newStreamSeqNum, nextStageReserve, numInFlightFetches(), BaseCPU::numThreads, out, popAndDiscard(), prediction, processResponse(), Minor::Fetch1::Fetch1ThreadInfo::state, stepQueues(), Minor::Fetch1::Fetch1ThreadInfo::streamSeqNum, Minor::InstId::threadId, Minor::BranchData::threadId, transfers, and MinorCPU::wakeupOnEvent().

Referenced by Minor::Pipeline::evaluate(), and getIcachePort().

◆ fetchLine()

void Minor::Fetch1::fetchLine ( ThreadID tid )

protected

Insert a line fetch into the requests.

This can be a partial line request where the given address has a non-0 offset into a line.

Definition at line 148 of file fetch1.cc.

References cpu, DPRINTF, BaseTLB::Execute, fetchInfo, BaseCPU::getContext(), Minor::Fetch1::FetchRequest::id, Request::INST_FETCH, BaseCPU::instMasterId(), Minor::Fetch1::FetchRequest::InTranslation, lineSeqNum, lineSnap, maxLineWidth, numFetchesInITLB, Minor::Fetch1::Fetch1ThreadInfo::pc, Minor::Fetch1::Fetch1ThreadInfo::predictionSeqNum, Minor::Queue< ElemType, ReportTraits, BubbleTraits >::push(), Minor::Fetch1::FetchRequest::request, requests, Minor::Queue< ElemType, ReportTraits, BubbleTraits >::reserve(), Minor::Fetch1::FetchRequest::state, Minor::Fetch1::Fetch1ThreadInfo::streamSeqNum, Minor::InstId::threadId, MinorCPU::threads, and transfers.

Referenced by evaluate().

◆ getIcachePort()

MinorCPU::MinorCPUPort& Minor::Fetch1::getIcachePort ( )

inline

Returns the IcachePort owned by this Fetch1.

Definition at line 395 of file fetch1.hh.

References evaluate(), icachePort, isDrained(), minorTrace(), and wakeupFetch().

Referenced by Minor::Pipeline::getInstPort().

◆ getScheduledThread()

ThreadID Minor::Fetch1::getScheduledThread ( )

inlineprotected

Use the current threading policy to determine the next thread to fetch from.

Definition at line 116 of file fetch1.cc.

References ThreadContext::Active, cpu, fetchInfo, FetchRunning, BaseCPU::getContext(), InvalidThreadID, panic, MinorCPU::randomPriority(), MinorCPU::roundRobinPriority(), ThreadContext::status(), MinorCPU::threadPolicy, and threadPriority.

Referenced by evaluate().

◆ handleTLBResponse()

void Minor::Fetch1::handleTLBResponse ( FetchRequestPtr response )

protected

Handle pushing a TLB response onto the right queue.

Definition at line 253 of file fetch1.cc.

References DPRINTF, DTRACE, Minor::Fetch1::FetchRequest::fault, minorTraceResponseLine(), Named::name(), NoFault, numFetchesInITLB, Minor::Fetch1::FetchRequest::request, Minor::Fetch1::FetchRequest::state, Minor::Fetch1::FetchRequest::Translated, and tryToSendToTransfers().

◆ isDrained()

bool Minor::Fetch1::isDrained ( )

Is this stage drained? For Fetch1, draining is initiated by Execute signalling a branch with the reason HaltFetch.

Definition at line 728 of file fetch1.cc.

References cpu, DPRINTF, FetchHalted, fetchInfo, FetchRunning, numInFlightFetches(), BaseCPU::numThreads, out, and Minor::Fetch1::Fetch1ThreadInfo::state.

Referenced by getIcachePort(), and Minor::Pipeline::isDrained().

◆ minorTrace()

void Minor::Fetch1::minorTrace ( ) const

Definition at line 762 of file fetch1.cc.

References Minor::Fetch1::Fetch1ThreadInfo::blocked, data, fetchInfo, icacheState, MINORTRACE, Minor::Queue< ElemType, ReportTraits, BubbleTraits >::minorTrace(), numFetchesInITLB, numFetchesInMemorySystem, out, requests, Minor::Fetch1::Fetch1ThreadInfo::state, Minor::Fetch1::Fetch1ThreadInfo::streamSeqNum, and transfers.

Referenced by getIcachePort(), and Minor::Pipeline::minorTrace().

◆ minorTraceResponseLine()

void Minor::Fetch1::minorTraceResponseLine	(	const std::string &	name,
		Fetch1::FetchRequestPtr	response
	)		const

protected

Print the appropriate MinorLine line for a fetch response.

Definition at line 398 of file fetch1.cc.

References Minor::Fetch1::FetchRequest::fault, Minor::Fetch1::FetchRequest::id, Packet::isError(), M5_VAR_USED, MINORLINE, NoFault, Minor::Fetch1::FetchRequest::packet, and Minor::Fetch1::FetchRequest::request.

Referenced by handleTLBResponse(), and recvTimingResp().

◆ moveFromRequestsToTransfers()

void Minor::Fetch1::moveFromRequestsToTransfers ( FetchRequestPtr request )

protected

Move a request between queues.

Definition at line 322 of file fetch1.cc.

References Minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), Minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), Minor::Queue< ElemType, ReportTraits, BubbleTraits >::pop(), Minor::Queue< ElemType, ReportTraits, BubbleTraits >::push(), requests, and transfers.

Referenced by recvReqRetry(), and tryToSendToTransfers().

◆ numInFlightFetches()

unsigned int Minor::Fetch1::numInFlightFetches ( )

protected

Returns the total number of queue occupancy, in-ITLB and in-memory system fetches.

Definition at line 390 of file fetch1.cc.

References Minor::Queue< ElemType, ReportTraits, BubbleTraits >::occupiedSpace(), requests, and transfers.

Referenced by evaluate(), and isDrained().

◆ popAndDiscard()

void Minor::Fetch1::popAndDiscard ( FetchQueue & queue )

protected

Pop a request from the given queue and correctly deallocate and discard it.

Definition at line 381 of file fetch1.cc.

References Minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), Minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), and Minor::Queue< ElemType, ReportTraits, BubbleTraits >::pop().

Referenced by evaluate().

◆ processResponse()

void Minor::Fetch1::processResponse	(	Fetch1::FetchRequestPtr	response,
		ForwardLineData &	line
	)

protected

Convert a response to a ForwardLineData.

Definition at line 539 of file fetch1.cc.

References Minor::ForwardLineData::adoptPacketData(), DPRINTF, Minor::Fetch1::FetchRequest::fault, fetchInfo, FetchWaitingForPC, Minor::Fetch1::FetchRequest::id, Minor::ForwardLineData::id, Minor::ForwardLineData::lineBaseAddr, NoFault, Minor::Fetch1::FetchRequest::packet, Minor::Fetch1::FetchRequest::pc, Minor::ForwardLineData::pc, Minor::Fetch1::FetchRequest::request, Minor::ForwardLineData::setFault(), Minor::Fetch1::Fetch1ThreadInfo::state, and Minor::InstId::threadId.

Referenced by evaluate().

◆ recvReqRetry()

void Minor::Fetch1::recvReqRetry ( )

protectedvirtual

Definition at line 454 of file fetch1.cc.

References DPRINTF, Minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), Minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), IcacheNeedsRetry, IcacheRunning, icacheState, moveFromRequestsToTransfers(), requests, and tryToSend().

Referenced by Minor::Fetch1::IcachePort::recvReqRetry().

◆ recvTimingResp()

bool Minor::Fetch1::recvTimingResp ( PacketPtr pkt )

protectedvirtual

Memory interface.

Definition at line 417 of file fetch1.cc.

References Minor::Fetch1::FetchRequest::Complete, cpu, DPRINTF, DTRACE, Minor::Pipeline::Fetch1StageId, Minor::Fetch1::FetchRequest::id, Packet::isError(), minorTraceResponseLine(), Named::name(), numFetchesInMemorySystem, Minor::Fetch1::FetchRequest::packet, Packet::popSenderState(), safe_cast(), Minor::Fetch1::FetchRequest::state, and MinorCPU::wakeupOnEvent().

Referenced by Minor::Fetch1::IcachePort::recvTimingResp().

◆ stepQueues()

void Minor::Fetch1::stepQueues ( )

protected

Step requests along between requests and transfers queues.

Definition at line 359 of file fetch1.cc.

References DPRINTF, Minor::Queue< ElemType, ReportTraits, BubbleTraits >::empty(), Minor::Queue< ElemType, ReportTraits, BubbleTraits >::front(), IcacheNeedsRetry, IcacheRunning, icacheState, requests, and tryToSendToTransfers().

Referenced by evaluate().

◆ tryToSend()

bool Minor::Fetch1::tryToSend ( FetchRequestPtr request )

protected

Try to send (or resend) a memory request's next/only packet to the memory system.

Returns true if the fetch was successfully sent to memory

Definition at line 331 of file fetch1.cc.

References DPRINTF, IcacheNeedsRetry, icachePort, icacheState, Minor::Fetch1::FetchRequest::id, numFetchesInMemorySystem, Minor::Fetch1::FetchRequest::packet, Minor::Fetch1::FetchRequest::RequestIssuing, MasterPort::sendTimingReq(), and Minor::Fetch1::FetchRequest::state.

Referenced by recvReqRetry(), and tryToSendToTransfers().

◆ tryToSendToTransfers()

void Minor::Fetch1::tryToSendToTransfers ( FetchRequestPtr request )

protected

Try and issue a fetch for a translated request at the head of the requests queue.

Also tries to move the request between queues

Definition at line 283 of file fetch1.cc.

Referenced by handleTLBResponse(), and stepQueues().

◆ updateExpectedSeqNums()

void Minor::Fetch1::updateExpectedSeqNums ( const BranchData & branch )

protected

Update streamSeqNum and predictionSeqNum from the given branch (and assume these have changed and discard (on delivery) all lines in flight)

Definition at line 521 of file fetch1.cc.

References DPRINTF, fetchInfo, Minor::BranchData::newPredictionSeqNum, Minor::BranchData::newStreamSeqNum, Minor::Fetch1::Fetch1ThreadInfo::predictionSeqNum, Minor::Fetch1::Fetch1ThreadInfo::streamSeqNum, and Minor::BranchData::threadId.

Referenced by changeStream().

◆ wakeupFetch()

void Minor::Fetch1::wakeupFetch ( ThreadID tid )

Initiate fetch1 fetching.

Definition at line 714 of file fetch1.cc.

References cpu, DPRINTF, Minor::Pipeline::Fetch1StageId, fetchInfo, FetchRunning, BaseCPU::getContext(), Minor::Fetch1::Fetch1ThreadInfo::pc, ThreadContext::pcState(), Minor::Fetch1::Fetch1ThreadInfo::state, Minor::Fetch1::Fetch1ThreadInfo::wakeupGuard, and MinorCPU::wakeupOnEvent().

Referenced by Minor::Pipeline::drainResume(), getIcachePort(), and Minor::Pipeline::wakeupFetch().

Friends And Related Function Documentation

◆ operator<< [1/2]

std::ostream& operator<<	(	std::ostream &	os,
		Fetch1::FetchState	state
	)

friend

Definition at line 469 of file fetch1.cc.

◆ operator<< [2/2]

std::ostream& operator<<	(	std::ostream &	os,
		Fetch1::IcacheState	state
	)

friend

Definition at line 211 of file fetch1.cc.

Member Data Documentation

◆ cpu

MinorCPU& Minor::Fetch1::cpu

protected

Construction-assigned data members.

Pointer back to the containing CPU

Definition at line 192 of file fetch1.hh.

Referenced by evaluate(), Fetch1(), fetchLine(), getScheduledThread(), isDrained(), recvTimingResp(), tryToSendToTransfers(), and wakeupFetch().

◆ fetchInfo

std::vector<Fetch1ThreadInfo> Minor::Fetch1::fetchInfo

protected

Definition at line 283 of file fetch1.hh.

Referenced by changeStream(), evaluate(), fetchLine(), getScheduledThread(), isDrained(), minorTrace(), processResponse(), updateExpectedSeqNums(), and wakeupFetch().

◆ fetchLimit

unsigned int Minor::Fetch1::fetchLimit

protected

Maximum number of fetches allowed in flight (in queues or memory)

Definition at line 220 of file fetch1.hh.

Referenced by evaluate(), and Fetch1().

◆ icachePort

IcachePort Minor::Fetch1::icachePort

protected

IcachePort to pass to the CPU.

Fetch1 is the only module that uses it.

Definition at line 206 of file fetch1.hh.

Referenced by getIcachePort(), and tryToSend().

◆ icacheState

IcacheState Minor::Fetch1::icacheState

protected

Retry state of icache_port.

Definition at line 305 of file fetch1.hh.

Referenced by minorTrace(), recvReqRetry(), stepQueues(), and tryToSend().

◆ inp

Latch<BranchData>::Output Minor::Fetch1::inp

protected

Input port carrying branch requests from Execute.

Definition at line 195 of file fetch1.hh.

Referenced by evaluate().

◆ lineSeqNum

InstSeqNum Minor::Fetch1::lineSeqNum

protected

Sequence number for line fetch used for ordering lines to flush.

Definition at line 308 of file fetch1.hh.

Referenced by fetchLine().

◆ lineSnap

unsigned int Minor::Fetch1::lineSnap

protected

Line snap size in bytes.

All fetches clip to make their ends not extend beyond this limit. Setting this to the machine L1 cache line length will result in fetches never crossing line boundaries.

Definition at line 211 of file fetch1.hh.

Referenced by Fetch1(), and fetchLine().

◆ maxLineWidth

unsigned int Minor::Fetch1::maxLineWidth

protected

Maximum fetch width in bytes.

Setting this (and lineSnap) to the machine L1 cache line length will result in fetches of whole cache lines. Setting this to sizeof(MachInst) will result it fetches of single instructions (except near the end of lineSnap lines)

Definition at line 217 of file fetch1.hh.

Referenced by Fetch1(), and fetchLine().

◆ nextStageReserve

std::vector<InputBuffer<ForwardLineData> >& Minor::Fetch1::nextStageReserve

protected

Interface to reserve space in the next stage.

Definition at line 202 of file fetch1.hh.

Referenced by evaluate().

◆ numFetchesInITLB

unsigned int Minor::Fetch1::numFetchesInITLB

protected

Number of requests inside the ITLB rather than in the queues.

All requests so located must have reserved space in the transfers queue

Definition at line 318 of file fetch1.hh.

Referenced by fetchLine(), handleTLBResponse(), and minorTrace().

◆ numFetchesInMemorySystem

unsigned int Minor::Fetch1::numFetchesInMemorySystem

protected

Count of the number fetches which have left the transfers queue and are in the 'wild' in the memory system.

Try not to rely on this value, it's better to code without knowledge of the number of outstanding accesses

Definition at line 314 of file fetch1.hh.

Referenced by minorTrace(), recvTimingResp(), and tryToSend().

◆ out

Latch<ForwardLineData>::Input Minor::Fetch1::out

protected

Output port carrying read lines to Fetch2.

Definition at line 197 of file fetch1.hh.

Referenced by evaluate(), isDrained(), and minorTrace().

◆ prediction

Latch<BranchData>::Output Minor::Fetch1::prediction

protected

Input port carrying branch predictions from Fetch2.

Definition at line 199 of file fetch1.hh.

Referenced by evaluate().

◆ requests

FetchQueue Minor::Fetch1::requests

protected

Queue of address translated requests from Fetch1.

Definition at line 299 of file fetch1.hh.

Referenced by fetchLine(), minorTrace(), moveFromRequestsToTransfers(), numInFlightFetches(), recvReqRetry(), stepQueues(), and tryToSendToTransfers().

◆ threadPriority

ThreadID Minor::Fetch1::threadPriority

protected

Definition at line 284 of file fetch1.hh.

Referenced by getScheduledThread().

◆ transfers

FetchQueue Minor::Fetch1::transfers

protected

Queue of in-memory system requests and responses.

Definition at line 302 of file fetch1.hh.

Referenced by evaluate(), fetchLine(), minorTrace(), moveFromRequestsToTransfers(), and numInFlightFetches().

The documentation for this class was generated from the following files:

cpu/minor/fetch1.hh
cpu/minor/fetch1.cc

Classes

Public Member Functions

Protected Types

Protected Member Functions

Protected Attributes

Friends

Detailed Description

Member Typedef Documentation

◆ FetchQueue

◆ FetchRequestPtr

Member Enumeration Documentation

◆ FetchState

◆ IcacheState

Constructor & Destructor Documentation

◆ Fetch1()

Member Function Documentation

◆ changeStream()

◆ evaluate()

◆ fetchLine()

◆ getIcachePort()

◆ getScheduledThread()

◆ handleTLBResponse()

◆ isDrained()

◆ minorTrace()

◆ minorTraceResponseLine()

◆ moveFromRequestsToTransfers()

◆ numInFlightFetches()

◆ popAndDiscard()

◆ processResponse()

◆ recvReqRetry()

◆ recvTimingResp()

◆ stepQueues()

◆ tryToSend()

◆ tryToSendToTransfers()

◆ updateExpectedSeqNums()

◆ wakeupFetch()

Friends And Related Function Documentation

◆ operator<< [1/2]

◆ operator<< [2/2]

Member Data Documentation

◆ cpu

◆ fetchInfo

◆ fetchLimit

◆ icachePort

◆ icacheState

◆ inp

◆ lineSeqNum

◆ lineSnap

◆ maxLineWidth

◆ nextStageReserve

◆ numFetchesInITLB

◆ numFetchesInMemorySystem

◆ out

◆ prediction

◆ requests

◆ threadPriority

◆ transfers