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arch
arm
isa_device.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2014, 2017 ARM Limited
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
7
* property including but not limited to intellectual property relating
8
* to a hardware implementation of the functionality of the software
9
* licensed hereunder. You may use the software subject to the license
10
* terms below provided that you ensure that this notice is replicated
11
* unmodified and in its entirety in all distributions of the software,
12
* modified or unmodified, in source code or in binary form.
13
*
14
* Redistribution and use in source and binary forms, with or without
15
* modification, are permitted provided that the following conditions are
16
* met: redistributions of source code must retain the above copyright
17
* notice, this list of conditions and the following disclaimer;
18
* redistributions in binary form must reproduce the above copyright
19
* notice, this list of conditions and the following disclaimer in the
20
* documentation and/or other materials provided with the distribution;
21
* neither the name of the copyright holders nor the names of its
22
* contributors may be used to endorse or promote products derived from
23
* this software without specific prior written permission.
24
*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36
*
37
* Authors: Andreas Sandberg
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*/
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40
#ifndef __ARCH_ARM_ISA_DEVICE_HH__
41
#define __ARCH_ARM_ISA_DEVICE_HH__
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43
#include "
arch/arm/registers.hh
"
44
#include "
base/compiler.hh
"
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46
class
ThreadContext
;
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48
namespace
ArmISA
49
{
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51
class
ISA;
52
60
class
BaseISADevice
61
{
62
public
:
63
BaseISADevice
();
64
virtual
~BaseISADevice
() {}
65
66
virtual
void
setISA
(
ISA
*
isa
);
67
virtual
void
setThreadContext
(
ThreadContext
*tc) {}
68
75
virtual
void
setMiscReg
(
int
misc_reg,
RegVal
val
) = 0;
76
83
virtual
RegVal
readMiscReg
(
int
misc_reg) = 0;
84
85
protected
:
86
ISA
*
isa
;
87
};
88
96
class
DummyISADevice
:
public
BaseISADevice
97
{
98
public
:
99
DummyISADevice
()
100
:
BaseISADevice
() {}
101
~DummyISADevice
() {}
102
103
void
setMiscReg
(
int
misc_reg,
RegVal
val
)
override
;
104
RegVal
readMiscReg
(
int
misc_reg)
override
;
105
};
106
107
}
108
109
#endif // __ARCH_ARM_ISA_DEVICE_HH__
ArmISA::ISA
Definition:
isa.hh:67
ArmISA::BaseISADevice::isa
ISA * isa
Definition:
isa_device.hh:86
ArmISA::BaseISADevice::setISA
virtual void setISA(ISA *isa)
Definition:
isa_device.cc:53
ArmISA::BaseISADevice::readMiscReg
virtual RegVal readMiscReg(int misc_reg)=0
Read a system register belonging to this device.
ArmISA::BaseISADevice
Base class for devices that use the MiscReg interfaces.
Definition:
isa_device.hh:60
RegVal
uint64_t RegVal
Definition:
types.hh:168
ArmISA::DummyISADevice
Dummy device that prints a warning when it is accessed.
Definition:
isa_device.hh:96
ArmISA
Definition:
ccregs.hh:42
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Definition:
thread_context.hh:93
ArmISA::BaseISADevice::setThreadContext
virtual void setThreadContext(ThreadContext *tc)
Definition:
isa_device.hh:67
X86ISA::val
Bitfield< 63 > val
Definition:
misc.hh:771
ArmISA::DummyISADevice::~DummyISADevice
~DummyISADevice()
Definition:
isa_device.hh:101
ArmISA::BaseISADevice::~BaseISADevice
virtual ~BaseISADevice()
Definition:
isa_device.hh:64
ArmISA::DummyISADevice::DummyISADevice
DummyISADevice()
Definition:
isa_device.hh:99
ArmISA::BaseISADevice::setMiscReg
virtual void setMiscReg(int misc_reg, RegVal val)=0
Write to a system register belonging to this device.
registers.hh
ArmISA::BaseISADevice::BaseISADevice
BaseISADevice()
Definition:
isa_device.cc:47
compiler.hh
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