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kmi.hh
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40  * Authors: William Wang
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42 
43 
48 #ifndef __DEV_ARM_PL050_HH__
49 #define __DEV_ARM_PL050_HH__
50 
51 #include <list>
52 
53 #include "base/vnc/vncinput.hh"
54 #include "dev/arm/amba_device.hh"
55 #include "params/Pl050.hh"
56 
57 class PS2Device;
58 
59 class Pl050 : public AmbaIntDevice
60 {
61  protected:
62  static const int kmiCr = 0x000;
63  static const int kmiStat = 0x004;
64  static const int kmiData = 0x008;
65  static const int kmiClkDiv = 0x00C;
66  static const int kmiISR = 0x010;
67 
68  BitUnion8(ControlReg)
69  Bitfield<0> force_clock_low;
70  Bitfield<1> force_data_low;
71  Bitfield<2> enable;
72  Bitfield<3> txint_enable;
73  Bitfield<4> rxint_enable;
74  Bitfield<5> type;
75  EndBitUnion(ControlReg)
76 
77 
79  ControlReg control;
80 
82  BitUnion8(StatusReg)
83  Bitfield<0> data_in;
84  Bitfield<1> clk_in;
85  Bitfield<2> rxparity;
86  Bitfield<3> rxbusy;
87  Bitfield<4> rxfull;
88  Bitfield<5> txbusy;
89  Bitfield<6> txempty;
90  EndBitUnion(StatusReg)
91 
92  StatusReg status;
93 
99  uint8_t clkdiv;
100 
101  BitUnion8(InterruptReg)
102  Bitfield<0> rx;
103  Bitfield<1> tx;
104  EndBitUnion(InterruptReg)
105 
106 
107  InterruptReg rawInterrupts;
108 
110  void setTxInt(bool value);
111 
113  void updateRxInt();
114 
119  void updateIntCtrl(InterruptReg ints, ControlReg ctrl);
120 
121  void setInterrupts(InterruptReg ints) { updateIntCtrl(ints, control); }
122  void setControl(ControlReg ctrl) { updateIntCtrl(rawInterrupts, ctrl); }
123 
125  InterruptReg getInterrupt() const;
126 
129 
130  public:
131  Pl050(const Pl050Params *p);
132 
133  Tick read(PacketPtr pkt) override;
134  Tick write(PacketPtr pkt) override;
135 
136  void serialize(CheckpointOut &cp) const override;
137  void unserialize(CheckpointIn &cp) override;
138 };
139 
140 #endif // __DEV_ARM_PL050_HH__
InterruptReg getInterrupt() const
Get current interrupt value.
Definition: kmi.cc:198
Bitfield< 3 > txint_enable
Definition: kmi.hh:72
void updateRxInt()
Update the RX interrupt using PS/2 device state.
Definition: kmi.cc:169
void setInterrupts(InterruptReg ints)
Definition: kmi.hh:121
Bitfield< 2 > rxparity
Definition: kmi.hh:85
void updateIntCtrl(InterruptReg ints, ControlReg ctrl)
Update the status of the interrupt and control registers and deliver an interrupt if required...
Definition: kmi.cc:179
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: kmi.cc:209
Definition: kmi.hh:59
Bitfield< 5 > type
Definition: kmi.hh:74
static const int kmiClkDiv
Definition: kmi.hh:65
Definition: cprintf.cc:42
Bitfield< 5 > txbusy
Definition: kmi.hh:88
void setTxInt(bool value)
Set or clear the TX interrupt.
Definition: kmi.cc:159
Bitfield< 5, 0 > status
Bitfield< 3 > rxbusy
Definition: kmi.hh:86
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: kmi.cc:63
Bitfield< 2 > enable
Definition: kmi.hh:71
void setControl(ControlReg ctrl)
Definition: kmi.hh:122
Pl050(const Pl050Params *p)
Definition: kmi.cc:54
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: kmi.cc:218
This is a base class for AMBA devices that have to respond to Device and Implementer ID calls...
uint64_t Tick
Tick count type.
Definition: types.hh:63
static const int kmiISR
Definition: kmi.hh:66
EndBitUnion(ControlReg) ControlReg control
control register
static const int kmiData
Definition: kmi.hh:64
Bitfield< 4 > rxint_enable
Definition: kmi.hh:73
Bitfield< 1 > tx
Definition: kmi.hh:103
Bitfield< 1 > force_data_low
Definition: kmi.hh:70
PS2Device * ps2
PS2 device connected to this KMI interface.
Definition: kmi.hh:128
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:255
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: kmi.cc:115
Bitfield< 4 > rxfull
Definition: kmi.hh:87
Bitfield< 1 > clk_in
Definition: kmi.hh:84
Declaration of a VNC input.
std::ostream CheckpointOut
Definition: serialize.hh:68
static const int kmiStat
Definition: kmi.hh:63
uint8_t clkdiv
clock divisor register This register is just kept around to satisfy reads after driver does writes...
Definition: kmi.hh:99
BitUnion8(ControlReg) Bitfield< 0 > force_clock_low
static const int kmiCr
Definition: kmi.hh:62
Bitfield< 0 > p
Bitfield< 6 > txempty
Definition: kmi.hh:89

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