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arch
arm
insts
pseudo.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2014,2016,2018 ARM Limited
3
* All rights reserved
4
*
5
* The license below extends only to copyright in the software and shall
6
* not be construed as granting a license to any other intellectual
7
* property including but not limited to intellectual property relating
8
* to a hardware implementation of the functionality of the software
9
* licensed hereunder. You may use the software subject to the license
10
* terms below provided that you ensure that this notice is replicated
11
* unmodified and in its entirety in all distributions of the software,
12
* modified or unmodified, in source code or in binary form.
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*
14
* Copyright (c) 2007-2008 The Florida State University
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* All rights reserved.
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*
17
* Redistribution and use in source and binary forms, with or without
18
* modification, are permitted provided that the following conditions are
19
* met: redistributions of source code must retain the above copyright
20
* notice, this list of conditions and the following disclaimer;
21
* redistributions in binary form must reproduce the above copyright
22
* notice, this list of conditions and the following disclaimer in the
23
* documentation and/or other materials provided with the distribution;
24
* neither the name of the copyright holders nor the names of its
25
* contributors may be used to endorse or promote products derived from
26
* this software without specific prior written permission.
27
*
28
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39
*
40
* Authors: Andreas Sandberg
41
* Stephen Hines
42
*/
43
44
#ifndef __ARCH_ARM_INSTS_PSEUDO_HH__
45
#define __ARCH_ARM_INSTS_PSEUDO_HH__
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47
#include "
arch/arm/insts/static_inst.hh
"
48
49
class
DecoderFaultInst
:
public
ArmStaticInst
50
{
51
protected
:
52
DecoderFault
faultId
;
53
54
const
char
*
faultName
()
const
;
55
56
public
:
57
DecoderFaultInst
(
ExtMachInst
_machInst);
58
59
Fault
execute
(
ExecContext
*xc,
60
Trace::InstRecord
*traceData)
const override
;
61
62
std::string
generateDisassembly
(
63
Addr
pc
,
const
SymbolTable
*symtab)
const override
;
64
};
65
73
class
FailUnimplemented
:
public
ArmStaticInst
74
{
75
private
:
78
std::string
fullMnemonic
;
79
80
public
:
81
FailUnimplemented
(
const
char
*_mnemonic,
ExtMachInst
_machInst);
82
FailUnimplemented
(
const
char
*_mnemonic,
ExtMachInst
_machInst,
83
const
std::string& _fullMnemonic);
84
85
Fault
execute
(
ExecContext
*xc,
86
Trace::InstRecord
*traceData)
const override
;
87
88
std::string
generateDisassembly
(
89
Addr
pc
,
const
SymbolTable
*symtab)
const override
;
90
};
91
101
class
WarnUnimplemented
:
public
ArmStaticInst
102
{
103
private
:
105
mutable
bool
warned
;
108
std::string
fullMnemonic
;
109
110
public
:
111
WarnUnimplemented
(
const
char
*_mnemonic,
ExtMachInst
_machInst);
112
WarnUnimplemented
(
const
char
*_mnemonic,
ExtMachInst
_machInst,
113
const
std::string& _fullMnemonic);
114
115
Fault
execute
(
ExecContext
*xc,
116
Trace::InstRecord
*traceData)
const override
;
117
118
std::string
generateDisassembly
(
119
Addr
pc
,
const
SymbolTable
*symtab)
const override
;
120
};
121
129
class
IllegalExecInst
:
public
ArmStaticInst
130
{
131
public
:
132
IllegalExecInst
(
ExtMachInst
_machInst);
133
134
Fault
execute
(
ExecContext
*xc,
Trace::InstRecord
*traceData)
const
;
135
};
136
137
#endif
DecoderFaultInst::faultId
DecoderFault faultId
Definition:
pseudo.hh:52
DecoderFaultInst::generateDisassembly
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition:
pseudo.cc:103
SymbolTable
Definition:
symtab.hh:42
DecoderFaultInst::execute
Fault execute(ExecContext *xc, Trace::InstRecord *traceData) const override
Definition:
pseudo.cc:59
WarnUnimplemented::warned
bool warned
Have we warned on this instruction yet?
Definition:
pseudo.hh:105
ExecContext
The ExecContext is an abstract base class the provides the interface used by the ISA to manipulate th...
Definition:
exec_context.hh:73
MipsISA::pc
Bitfield< 4 > pc
Definition:
pra_constants.hh:242
static_inst.hh
ArmISA::ArmStaticInst
Definition:
static_inst.hh:59
FailUnimplemented
Static instruction class for unimplemented instructions that cause simulator termination.
Definition:
pseudo.hh:73
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
WarnUnimplemented::fullMnemonic
std::string fullMnemonic
Full mnemonic for MRC and MCR instructions including the coproc.
Definition:
pseudo.hh:108
DecoderFaultInst::DecoderFaultInst
DecoderFaultInst(ExtMachInst _machInst)
Definition:
pseudo.cc:48
DecoderFaultInst::faultName
const char * faultName() const
Definition:
pseudo.cc:86
Trace::InstRecord
Definition:
insttracer.hh:58
FailUnimplemented::fullMnemonic
std::string fullMnemonic
Full mnemonic for MRC and MCR instructions including the coproc.
Definition:
pseudo.hh:78
StaticInst::ExtMachInst
TheISA::ExtMachInst ExtMachInst
Binary extended machine instruction type.
Definition:
static_inst.hh:87
Fault
std::shared_ptr< FaultBase > Fault
Definition:
types.hh:240
IllegalExecInst
This class is modelling instructions which are not going to be executed since they are flagged as Ill...
Definition:
pseudo.hh:129
ArmISA::DecoderFault
DecoderFault
Instruction decoder fault codes in ExtMachInst.
Definition:
types.hh:657
WarnUnimplemented
Base class for unimplemented instructions that cause a warning to be printed (but do not terminate si...
Definition:
pseudo.hh:101
DecoderFaultInst
Definition:
pseudo.hh:49
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