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arch
riscv
stacktrace.hh
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2005 The Regents of The University of Michigan
3
* Copyright (c) 2007-2008 The Florida State University
4
* Copyright (c) 2009 The University of Edinburgh
5
* All rights reserved.
6
*
7
* Redistribution and use in source and binary forms, with or without
8
* modification, are permitted provided that the following conditions are
9
* met: redistributions of source code must retain the above copyright
10
* notice, this list of conditions and the following disclaimer;
11
* redistributions in binary form must reproduce the above copyright
12
* notice, this list of conditions and the following disclaimer in the
13
* documentation and/or other materials provided with the distribution;
14
* neither the name of the copyright holders nor the names of its
15
* contributors may be used to endorse or promote products derived from
16
* this software without specific prior written permission.
17
*
18
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29
*
30
* Authors: Ali Saidi
31
* Stephen Hines
32
* Timothy M. Jones
33
*/
34
35
#ifndef __ARCH_RISCV_STACKTRACE_HH__
36
#define __ARCH_RISCV_STACKTRACE_HH__
37
38
#include "
base/trace.hh
"
39
#include "
cpu/static_inst.hh
"
40
#include "debug/Stack.hh"
41
42
class
ThreadContext
;
43
class
StackTrace;
44
45
namespace
RiscvISA
46
{
47
48
class
ProcessInfo
49
{
50
public
:
51
ProcessInfo
(
ThreadContext
*_tc);
52
53
Addr
task
(
Addr
ksp)
const
;
54
int
pid
(
Addr
ksp)
const
;
55
std::string
name
(
Addr
ksp)
const
;
56
};
57
58
class
StackTrace
59
{
60
private
:
61
ThreadContext
*
tc
;
62
std::vector<Addr>
stack
;
63
64
private
:
65
bool
isEntry(
Addr
addr
);
66
bool
decodePrologue(
Addr
sp
,
Addr
callpc,
Addr
func,
int
&size,
Addr
&
ra
);
67
bool
decodeSave(
MachInst
inst,
int
&
reg
,
int
&disp);
68
bool
decodeStack(
MachInst
inst,
int
&disp);
69
70
void
trace(
ThreadContext
*tc,
bool
is_call);
71
72
public
:
73
StackTrace
();
74
StackTrace
(
ThreadContext
*tc,
const
StaticInstPtr
&inst);
75
~
StackTrace
();
76
77
void
78
clear
()
79
{
80
tc = 0;
81
stack.clear();
82
}
83
84
bool
85
valid
()
const
86
{
87
return
tc !=
nullptr
;
88
}
89
90
bool
trace(
ThreadContext
*tc,
const
StaticInstPtr
&inst);
91
92
public
:
93
const
std::vector<Addr>
&
94
getstack
()
const
95
{
96
return
stack
;
97
}
98
99
static
const
int
user
= 1;
100
static
const
int
console = 2;
101
static
const
int
unknown = 3;
102
103
#if TRACING_ON
104
private
:
105
void
dump
();
106
107
public
:
108
void
109
dprintf()
110
{
111
if
(
DTRACE
(Stack))
112
dump
();
113
}
114
#else
115
public
:
116
void
117
dprintf
()
118
{
119
}
120
#endif
121
};
122
123
inline
bool
124
StackTrace::trace
(
ThreadContext
*tc,
const
StaticInstPtr
&inst)
125
{
126
if
(!inst->
isCall
() && !inst->
isReturn
())
127
return
false
;
128
129
if
(valid())
130
clear();
131
132
trace(tc, !inst->
isReturn
());
133
return
true
;
134
}
135
136
}
// namespace RiscvISA
137
138
#endif // __ARCH_RISCV_STACKTRACE_HH__
X86ISA::reg
Bitfield< 5, 3 > reg
Definition:
types.hh:89
RiscvISA::ProcessInfo::ProcessInfo
ProcessInfo(ThreadContext *_tc)
Definition:
stacktrace.cc:40
RiscvISA::StackTrace::getstack
const std::vector< Addr > & getstack() const
Definition:
stacktrace.hh:94
RiscvISA::ProcessInfo::pid
int pid(Addr ksp) const
Definition:
stacktrace.cc:53
RiscvISA::MachInst
uint32_t MachInst
Definition:
types.hh:54
RiscvISA::ProcessInfo::task
Addr task(Addr ksp) const
Definition:
stacktrace.cc:46
addr
ip6_addr_t addr
Definition:
inet.hh:335
RiscvISA::StackTrace::clear
void clear()
Definition:
stacktrace.hh:78
RiscvISA::StackTrace::trace
void trace(ThreadContext *tc, bool is_call)
Definition:
stacktrace.cc:84
StaticInst::isReturn
bool isReturn() const
Definition:
static_inst.hh:175
RefCountingPtr< StaticInst >
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU...
Definition:
thread_context.hh:93
RiscvISA::ProcessInfo
Definition:
stacktrace.hh:48
std::vector< Addr >
trace.hh
RiscvISA::StackTrace::dprintf
void dprintf()
Definition:
stacktrace.hh:117
RiscvISA::sp
Bitfield< 4 > sp
Definition:
pra_constants.hh:269
DTRACE
#define DTRACE(x)
Definition:
trace.hh:227
static_inst.hh
RiscvISA::StackTrace::valid
bool valid() const
Definition:
stacktrace.hh:85
StaticInst::isCall
bool isCall() const
Definition:
static_inst.hh:174
Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition:
types.hh:142
RiscvISA::StackTrace
Definition:
stacktrace.hh:58
PowerISA::ra
Bitfield< 20, 16 > ra
Definition:
types.hh:47
RiscvISA::ProcessInfo::name
std::string name(Addr ksp) const
Definition:
stacktrace.cc:60
X86ISA::stack
Bitfield< 17, 16 > stack
Definition:
misc.hh:589
RiscvISA::StackTrace::tc
ThreadContext * tc
Definition:
stacktrace.hh:61
AlphaISA::Kernel::user
Definition:
kernel_stats.hh:48
RiscvISA::StackTrace::stack
std::vector< Addr > stack
Definition:
stacktrace.hh:62
Stats::dump
void dump()
Dump all statistics data to the registered outputs.
Definition:
statistics.cc:561
RiscvISA
Definition:
decoder.cc:37
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