gem5  v19.0.0.0
All Classes Namespaces Files Functions Variables Typedefs Enumerations Enumerator Friends Macros Modules Pages
tarmac_tracer.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2017-2018 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  *
37  * Authors: Giacomo Travaglini
38  */
39 
45 #ifndef __ARCH_ARM_TRACERS_TARMAC_TRACER_HH__
46 #define __ARCH_ARM_TRACERS_TARMAC_TRACER_HH__
47 
50 #include "params/TarmacTracer.hh"
51 #include "sim/insttracer.hh"
52 
53 class ThreadContext;
54 
55 namespace Trace {
56 
62 {
63  public:
65  const StaticInstPtr _staticInst,
66  ArmISA::PCState _pc)
67  : thread(_thread), staticInst(_staticInst), pc(_pc)
68  {}
69 
70  std::string tarmacCpuName() const;
71 
72  public:
76 };
77 
84 class TarmacTracer : public InstTracer
85 {
86  friend class TarmacTracerRecord;
87  friend class TarmacTracerRecordV8;
88 
89  public:
90  typedef TarmacTracerParams Params;
91 
92  TarmacTracer(const Params *p);
93 
100  InstRecord* getInstRecord(Tick when, ThreadContext *tc,
103  const StaticInstPtr macroStaticInst = NULL);
104 
105  protected:
106  typedef std::unique_ptr<Printable> PEntryPtr;
110 
117 
128 };
129 
130 } // namespace Trace
131 
132 #endif // __ARCH_ARM_TRACERS_TARMAC_TRACER_HH__
ArmISA::PCState pc
Tarmac Tracer: this tracer generates a new Tarmac Record for every instruction being executed in gem5...
std::vector< InstPtr > instQueue
Collection of heterogeneous printable entries: could be representing either instructions, register or memory entries.
std::unique_ptr< TraceRegEntry > RegPtr
This object type is encapsulating the informations needed by a Tarmac record to generate it&#39;s own ent...
TarmacTracerRecord::RegPtr RegPtr
Tick startTick
startTick and endTick allow to trace a specific window of ticks rather than the entire CPU execution...
TarmacTracer record for ARMv8 CPUs: The record is adding some data to the base TarmacTracer record...
ThreadContext is the external interface to all thread state for anything outside of the CPU...
std::vector< RegPtr > regQueue
std::unique_ptr< Printable > PEntryPtr
std::vector< MemPtr > memQueue
std::unique_ptr< TraceMemEntry > MemPtr
uint64_t Tick
Tick count type.
Definition: types.hh:63
TarmacTracerRecord::InstPtr InstPtr
TarmacTracerParams Params
TarmacContext(ThreadContext *_thread, const StaticInstPtr _staticInst, ArmISA::PCState _pc)
TarmacTracer Record: Record generated by the TarmacTracer for every executed instruction.
std::unique_ptr< TraceInstEntry > InstPtr
const StaticInstPtr staticInst
std::string tarmacCpuName() const
GenericISA::SimplePCState< MachInst > PCState
Definition: types.hh:43
TarmacTracerRecord::MemPtr MemPtr
Bitfield< 0 > p
ThreadContext * thread

Generated on Fri Feb 28 2020 16:26:57 for gem5 by doxygen 1.8.13