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tarmac_tracer.cc
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37  * Authors: Giacomo Travaglini
38  */
39 
40 #include "tarmac_tracer.hh"
41 
42 #include <string>
43 
44 #include "arch/arm/system.hh"
45 #include "cpu/base.hh"
46 
47 namespace Trace {
48 
49 std::string
51 {
52  auto id = thread->getCpuPtr()->cpuId();
53  return "cpu" + std::to_string(id);
54 }
55 
57  : InstTracer(p),
58  startTick(p->start_tick),
59  endTick(p->end_tick)
60 {
61  // Wrong parameter setting: The trace end happens before the
62  // trace start.
64  "Tarmac start point: %lu is bigger than "
65  "Tarmac end point: %lu\n", startTick, endTick);
66 
67  // By default cpu tracers in gem5 are not tracing faults
68  // (exceptions).
69  // This is not in compliance with the Tarmac specification:
70  // instructions like SVC, SMC, HVC have to be traced.
71  // Tarmac Tracer is then automatically enabling this behaviour.
72  setDebugFlag("ExecFaulting");
73 }
74 
75 InstRecord *
77  const StaticInstPtr staticInst,
79  const StaticInstPtr macroStaticInst)
80 {
81  // Check if we need to start tracing since we have passed the
82  // tick start point.
83  if (when < startTick || when > endTick)
84  return nullptr;
85 
86  if (ArmSystem::highestELIs64(tc)) {
87  // TarmacTracerV8
88  return new TarmacTracerRecordV8(when, tc, staticInst, pc, *this,
89  macroStaticInst);
90  } else {
91  // TarmacTracer
92  return new TarmacTracerRecord(when, tc, staticInst, pc, *this,
93  macroStaticInst);
94  }
95 }
96 
97 } // namespace Trace
98 
100 TarmacTracerParams::create()
101 {
102  return new Trace::TarmacTracer(this);
103 }
InstRecord * getInstRecord(Tick when, ThreadContext *tc, const StaticInstPtr staticInst, ArmISA::PCState pc, const StaticInstPtr macroStaticInst=NULL)
Generates a TarmacTracerRecord, depending on the Tarmac version.
Tarmac Tracer: this tracer generates a new Tarmac Record for every instruction being executed in gem5...
Tick startTick
Definition: stat_control.cc:72
bool highestELIs64() const
Returns true if the register width of the highest implemented exception level is 64 bits (ARMv8) ...
Definition: system.hh:221
virtual BaseCPU * getCpuPtr()=0
Tick startTick
startTick and endTick allow to trace a specific window of ticks rather than the entire CPU execution...
int cpuId() const
Reads this CPU&#39;s ID.
Definition: base.hh:183
ThreadContext is the external interface to all thread state for anything outside of the CPU...
void setDebugFlag(const char *string)
Definition: debug.cc:179
Bitfield< 4 > pc
uint64_t Tick
Tick count type.
Definition: types.hh:63
friend class TarmacTracerRecord
TarmacTracer(const Params *p)
TarmacTracerParams Params
friend class TarmacTracerRecordV8
std::string tarmacCpuName() const
GenericISA::SimplePCState< MachInst > PCState
Definition: types.hh:43
Bitfield< 0 > p
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:185
ThreadContext * thread
const std::string to_string(sc_enc enc)
Definition: sc_fxdefs.cc:60

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