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uart8250.hh
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1 /*
2  * Copyright (c) 2005 The Regents of The University of Michigan
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * Authors: Ali Saidi
29  */
30 
35 #ifndef __DEV_UART8250_HH__
36 #define __DEV_UART8250_HH__
37 
38 #include "dev/io_device.hh"
39 #include "dev/serial/uart.hh"
40 #include "params/Uart8250.hh"
41 
42 /* UART8250 Interrupt ID Register
43  * bit 0 Interrupt Pending 0 = true, 1 = false
44  * bit 2:1 ID of highest priority interrupt
45  * bit 7:3 zeroes
46  */
47 const uint8_t IIR_NOPEND = 0x1;
48 
49 // Interrupt IDs
50 const uint8_t IIR_MODEM = 0x00; /* Modem Status (lowest priority) */
51 const uint8_t IIR_TXID = 0x02; /* Tx Data */
52 const uint8_t IIR_RXID = 0x04; /* Rx Data */
53 const uint8_t IIR_LINE = 0x06; /* Rx Line Status (highest priority)*/
54 
55 const uint8_t UART_IER_RDI = 0x01;
56 const uint8_t UART_IER_THRI = 0x02;
57 const uint8_t UART_IER_RLSI = 0x04;
58 
59 
60 const uint8_t UART_LSR_TEMT = 0x40;
61 const uint8_t UART_LSR_THRE = 0x20;
62 const uint8_t UART_LSR_DR = 0x01;
63 
64 const uint8_t UART_MCR_LOOP = 0x10;
65 
66 
67 class Terminal;
68 class Platform;
69 
70 class Uart8250 : public Uart
71 {
72  protected:
73  uint8_t IER, DLAB, LCR, MCR;
75 
76  void processIntrEvent(int intrBit);
77  void scheduleIntr(Event *event);
78 
81 
82  public:
83  typedef Uart8250Params Params;
84  const Params *
85  params() const
86  {
87  return dynamic_cast<const Params *>(_params);
88  }
89  Uart8250(const Params *p);
90 
91  Tick read(PacketPtr pkt) override;
92  Tick write(PacketPtr pkt) override;
93  AddrRangeList getAddrRanges() const override;
94 
98  void dataAvailable() override;
99 
100 
105  virtual bool intStatus() { return status ? true : false; }
106 
107  void serialize(CheckpointOut &cp) const override;
108  void unserialize(CheckpointIn &cp) override;
109 };
110 
111 #endif // __TSUNAMI_UART_HH__
const uint8_t UART_IER_THRI
Definition: uart8250.hh:56
uint8_t IER
Definition: uart8250.hh:73
EventFunctionWrapper txIntrEvent
Definition: uart8250.hh:79
const uint8_t UART_IER_RDI
Definition: uart8250.hh:55
void dataAvailable() override
Inform the uart that there is data available.
Definition: uart8250.cc:266
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: uart8250.cc:308
const uint8_t UART_LSR_TEMT
Definition: uart8250.hh:60
uint8_t LCR
Definition: uart8250.hh:73
Definition: cprintf.cc:42
const Params * params() const
Definition: uart8250.hh:85
const uint8_t UART_IER_RLSI
Definition: uart8250.hh:57
const uint8_t UART_MCR_LOOP
Definition: uart8250.hh:64
Base class for UART.
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: uart8250.cc:177
const uint8_t IIR_LINE
Definition: uart8250.hh:53
int status
Definition: uart.hh:51
uint8_t MCR
Definition: uart8250.hh:73
Uart8250(const Params *p)
Definition: uart8250.cc:88
uint64_t Tick
Tick count type.
Definition: types.hh:63
const uint8_t IIR_TXID
Definition: uart8250.hh:51
Uart8250Params Params
Definition: uart8250.hh:83
void processIntrEvent(int intrBit)
Definition: uart8250.cc:50
AddrRangeList getAddrRanges() const override
Determine the address ranges that this device responds to.
Definition: uart8250.cc:278
Tick read(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: uart8250.cc:96
const uint8_t UART_LSR_DR
Definition: uart8250.hh:62
A Packet is used to encapsulate a transfer between two objects in the memory system (e...
Definition: packet.hh:255
Bitfield< 10, 5 > event
void scheduleIntr(Event *event)
Definition: uart8250.cc:76
EventFunctionWrapper rxIntrEvent
Definition: uart8250.hh:80
const uint8_t UART_LSR_THRE
Definition: uart8250.hh:61
std::ostream CheckpointOut
Definition: serialize.hh:68
Definition: eventq.hh:189
Tick lastTxInt
Definition: uart8250.hh:74
const SimObjectParams * _params
Cached copy of the object parameters.
Definition: sim_object.hh:110
virtual bool intStatus()
Return if we have an interrupt pending.
Definition: uart8250.hh:105
uint8_t DLAB
Definition: uart8250.hh:73
Definition: uart.hh:48
Bitfield< 0 > p
const uint8_t IIR_MODEM
Definition: uart8250.hh:50
const uint8_t IIR_RXID
Definition: uart8250.hh:52
const uint8_t IIR_NOPEND
Definition: uart8250.hh:47
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: uart8250.cc:286

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