#include <base.hh>

Inheritance diagram for BaseSimpleCPU:

Public Member Functions
	BaseSimpleCPU (BaseSimpleCPUParams *params)

virtual	~BaseSimpleCPU ()

void	wakeup (ThreadID tid) override

void	init () override

void	checkForInterrupts ()

void	setupFetchRequest (const RequestPtr &req)

void	preExecute ()

void	postExecute ()

void	advancePC (const Fault &fault)

void	haltContext (ThreadID thread_num) override
	Notify the CPU that the indicated context is now halted. More...

void	regStats () override

void	resetStats () override

virtual Fault	readMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >())

virtual Fault	initiateMemRead (Addr addr, unsigned size, Request::Flags flags, const std::vector< bool > &byte_enable=std::vector< bool >())

virtual Fault	writeMem (uint8_t data, unsigned size, Addr addr, Request::Flags flags, uint64_t res, const std::vector< bool > &byte_enable=std::vector< bool >())

virtual Fault	amoMem (Addr addr, uint8_t *data, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op)

virtual Fault	initiateMemAMO (Addr addr, unsigned size, Request::Flags flags, AtomicOpFunctorPtr amo_op)

void	countInst ()

Counter	totalInsts () const override

Counter	totalOps () const override

void	serializeThread (CheckpointOut &cp, ThreadID tid) const override
	Serialize a single thread. More...

void	unserializeThread (CheckpointIn &cp, ThreadID tid) override
	Unserialize one thread. More...

virtual Fault	initiateHtmCmd (Request::Flags flags)=0
	Hardware transactional memory commands (HtmCmds), e.g. More...

virtual void	htmSendAbortSignal (HtmFailureFaultCause cause)=0
	This function is used to instruct the memory subsystem that a transaction should be aborted and the speculative state should be thrown away. More...

Public Member Functions inherited from BaseCPU
virtual Port &	getDataPort ()=0
	Purely virtual method that returns a reference to the data port. More...

virtual PortProxy::SendFunctionalFunc	getSendFunctional ()
	Returns a sendFunctional delegate for use with port proxies. More...

virtual Port &	getInstPort ()=0
	Purely virtual method that returns a reference to the instruction port. More...

int	cpuId () const
	Reads this CPU's ID. More...

uint32_t	socketId () const
	Reads this CPU's Socket ID. More...

RequestorID	dataRequestorId () const
	Reads this CPU's unique data requestor ID. More...

RequestorID	instRequestorId () const
	Reads this CPU's unique instruction requestor ID. More...

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port on this CPU. More...

uint32_t	taskId () const
	Get cpu task id. More...

void	taskId (uint32_t id)
	Set cpu task id. More...

uint32_t	getPid () const

void	setPid (uint32_t pid)

void	workItemBegin ()

void	workItemEnd ()

Tick	instCount ()

BaseInterrupts *	getInterruptController (ThreadID tid)

void	postInterrupt (ThreadID tid, int int_num, int index)

void	clearInterrupt (ThreadID tid, int int_num, int index)

void	clearInterrupts (ThreadID tid)

bool	checkInterrupts (ThreadID tid) const

Trace::InstTracer *	getTracer ()
	Provide access to the tracer pointer. More...

virtual void	activateContext (ThreadID thread_num)
	Notify the CPU that the indicated context is now active. More...

virtual void	suspendContext (ThreadID thread_num)
	Notify the CPU that the indicated context is now suspended. More...

int	findContext (ThreadContext *tc)
	Given a Thread Context pointer return the thread num. More...

virtual ThreadContext *	getContext (int tn)
	Given a thread num get tho thread context for it. More...

unsigned	numContexts ()
	Get the number of thread contexts available. More...

ThreadID	contextToThread (ContextID cid)
	Convert ContextID to threadID. More...

const Params *	params () const

	BaseCPU (Params *params, bool is_checker=false)

virtual	~BaseCPU ()

void	init () override

void	startup () override

void	regStats () override

void	regProbePoints () override

void	registerThreadContexts ()

void	deschedulePowerGatingEvent ()

void	schedulePowerGatingEvent ()

virtual void	switchOut ()
	Prepare for another CPU to take over execution. More...

virtual void	takeOverFrom (BaseCPU *cpu)
	Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in. More...

void	flushTLBs ()
	Flush all TLBs in the CPU. More...

bool	switchedOut () const
	Determine if the CPU is switched out. More...

virtual void	verifyMemoryMode () const
	Verify that the system is in a memory mode supported by the CPU. More...

unsigned int	cacheLineSize () const
	Get the cache line size of the system. More...

void	serialize (CheckpointOut &cp) const override
	Serialize this object to the given output stream. More...

void	unserialize (CheckpointIn &cp) override
	Reconstruct the state of this object from a checkpoint. More...

void	scheduleInstStop (ThreadID tid, Counter insts, const char *cause)
	Schedule an event that exits the simulation loops after a predefined number of instructions. More...

uint64_t	getCurrentInstCount (ThreadID tid)
	Get the number of instructions executed by the specified thread on this CPU. More...

void	traceFunctions (Addr pc)

void	armMonitor (ThreadID tid, Addr address)

bool	mwait (ThreadID tid, PacketPtr pkt)

void	mwaitAtomic (ThreadID tid, ThreadContext tc, BaseTLB dtb)

AddressMonitor *	getCpuAddrMonitor (ThreadID tid)

bool	waitForRemoteGDB () const

virtual void	probeInstCommit (const StaticInstPtr &inst, Addr pc)
	Helper method to trigger PMU probes for a committed instruction. More...

Public Attributes
Trace::InstRecord *	traceData

CheckerCPU *	checker

std::vector< SimpleExecContext * >	threadInfo

std::list< ThreadID >	activeThreads

TheISA::MachInst	inst
	Current instruction. More...

StaticInstPtr	curStaticInst

StaticInstPtr	curMacroStaticInst

Public Attributes inherited from BaseCPU
ThreadID	numThreads
	Number of threads we're actually simulating (<= SMT_MAX_THREADS). More...

System *	system

Stats::Scalar	numCycles

Stats::Scalar	numWorkItemsStarted

Stats::Scalar	numWorkItemsCompleted

Cycles	syscallRetryLatency

Protected Types
enum	Status { Idle, Running, Faulting, ITBWaitResponse, IcacheRetry, IcacheWaitResponse, IcacheWaitSwitch, DTBWaitResponse, DcacheRetry, DcacheWaitResponse, DcacheWaitSwitch }

Protected Types inherited from BaseCPU
enum	CPUState { CPU_STATE_ON, CPU_STATE_SLEEP, CPU_STATE_WAKEUP }

Protected Member Functions
void	checkPcEventQueue ()

void	swapActiveThread ()

void	traceFault ()
	Handler used when encountering a fault; its purpose is to tear down the InstRecord. More...

Protected Member Functions inherited from BaseCPU
void	updateCycleCounters (CPUState state)
	base method keeping track of cycle progression More...

void	enterPwrGating ()

ProbePoints::PMUUPtr	pmuProbePoint (const char *name)
	Helper method to instantiate probe points belonging to this object. More...

Protected Attributes
ThreadID	curThread

BPredUnit *	branchPred

Status	_status

Protected Attributes inherited from BaseCPU
Tick	instCnt
	Instruction count used for SPARC misc register. More...

int	_cpuId

const uint32_t	_socketId
	Each cpu will have a socket ID that corresponds to its physical location in the system. More...

RequestorID	_instRequestorId
	instruction side request id that must be placed in all requests More...

RequestorID	_dataRequestorId
	data side request id that must be placed in all requests More...

uint32_t	_taskId
	An intrenal representation of a task identifier within gem5. More...

uint32_t	_pid
	The current OS process ID that is executing on this processor. More...

bool	_switchedOut
	Is the CPU switched out or active? More...

const unsigned int	_cacheLineSize
	Cache the cache line size that we get from the system. More...

std::vector< BaseInterrupts * >	interrupts

std::vector< ThreadContext * >	threadContexts

Trace::InstTracer *	tracer

Cycles	previousCycle

CPUState	previousState

const Cycles	pwrGatingLatency

const bool	powerGatingOnIdle

EventFunctionWrapper	enterPwrGatingEvent

ProbePoints::PMUUPtr	ppRetiredInsts
	Instruction commit probe point. More...

ProbePoints::PMUUPtr	ppRetiredInstsPC

ProbePoints::PMUUPtr	ppRetiredLoads
	Retired load instructions. More...

ProbePoints::PMUUPtr	ppRetiredStores
	Retired store instructions. More...

ProbePoints::PMUUPtr	ppRetiredBranches
	Retired branches (any type) More...

ProbePoints::PMUUPtr	ppAllCycles
	CPU cycle counter even if any thread Context is suspended. More...

ProbePoints::PMUUPtr	ppActiveCycles
	CPU cycle counter, only counts if any thread contexts is active. More...

ProbePointArg< bool > *	ppSleeping
	ProbePoint that signals transitions of threadContexts sets. More...

Additional Inherited Members
Public Types inherited from BaseCPU
typedef BaseCPUParams	Params

Static Public Member Functions inherited from BaseCPU
static int	numSimulatedInsts ()

static int	numSimulatedOps ()

static void	wakeup (ThreadID tid)

static int	numSimulatedCPUs ()

static Counter	numSimulatedInsts ()

static Counter	numSimulatedOps ()

Static Public Attributes inherited from BaseCPU
static const uint32_t	invldPid = std::numeric_limits<uint32_t>::max()
	Invalid or unknown Pid. More...

static const Addr	PCMask = ~((Addr)sizeof(TheISA::MachInst) - 1)

Detailed Description

Definition at line 80 of file base.hh.

Member Enumeration Documentation

◆ Status

enum BaseSimpleCPU::Status

protected

Enumerator
Idle
Running
Faulting
ITBWaitResponse
IcacheRetry
IcacheWaitResponse
IcacheWaitSwitch
DTBWaitResponse
DcacheRetry
DcacheWaitResponse
DcacheWaitSwitch

Definition at line 107 of file base.hh.

Constructor & Destructor Documentation

◆ BaseSimpleCPU()

BaseSimpleCPU::BaseSimpleCPU ( BaseSimpleCPUParams * params )

Definition at line 83 of file base.cc.

References checker, fatal, FullSystem, SimpleThread::getTC(), ArmISA::i, BaseCPU::numThreads, MipsISA::p, CheckerCPU::setSystem(), BaseCPU::threadContexts, and threadInfo.

◆ ~BaseSimpleCPU()

BaseSimpleCPU::~BaseSimpleCPU ( )

virtual

Definition at line 198 of file base.cc.

Member Function Documentation

◆ advancePC()

void BaseSimpleCPU::advancePC ( const Fault & fault )

◆ amoMem()

virtual Fault BaseSimpleCPU::amoMem	(	Addr	addr,
		uint8_t *	data,
		unsigned	size,
		Request::Flags	flags,
		AtomicOpFunctorPtr	amo_op
	)

inlinevirtual

Reimplemented in AtomicSimpleCPU.

Definition at line 162 of file base.hh.

References panic.

Referenced by SimpleExecContext::amoMem().

◆ checkForInterrupts()

void BaseSimpleCPU::checkForInterrupts ( )

Definition at line 447 of file base.cc.

References BaseCPU::checkInterrupts(), curThread, SimpleThread::decoder, DPRINTF, SimpleExecContext::fetchOffset, SimpleThread::getTC(), SimpleExecContext::inHtmTransactionalState(), BaseCPU::interrupts, NoFault, SimpleExecContext::thread, and threadInfo.

Referenced by TimingSimpleCPU::fetch(), and AtomicSimpleCPU::tick().

◆ checkPcEventQueue()

void BaseSimpleCPU::checkPcEventQueue ( )

protected

Definition at line 133 of file base.cc.

References curThread, MipsISA::pc, BaseCPU::threadContexts, and threadInfo.

Referenced by TimingSimpleCPU::fetch(), and AtomicSimpleCPU::tick().

◆ countInst()

void BaseSimpleCPU::countInst ( )

Definition at line 161 of file base.cc.

References curStaticInst, curThread, ThreadState::funcExeInst, StaticInst::isLastMicroop(), StaticInst::isMicroop(), SimpleExecContext::numInst, SimpleExecContext::numInsts, SimpleExecContext::numOp, SimpleExecContext::numOps, BaseCPU::system, SimpleExecContext::thread, threadInfo, and System::totalNumInsts.

Referenced by TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), and AtomicSimpleCPU::tick().

◆ haltContext()

void BaseSimpleCPU::haltContext ( ThreadID thread_num )

overridevirtual

Notify the CPU that the indicated context is now halted.

Reimplemented from BaseCPU.

Definition at line 203 of file base.cc.

References BaseCPU::CPU_STATE_SLEEP, BaseCPU::suspendContext(), and BaseCPU::updateCycleCounters().

◆ htmSendAbortSignal()

virtual void BaseSimpleCPU::htmSendAbortSignal ( HtmFailureFaultCause cause )

pure virtual

This function is used to instruct the memory subsystem that a transaction should be aborted and the speculative state should be thrown away.

This is called in the transaction's very last breath in the core. Afterwards, the core throws away its speculative state and resumes execution at the point the transaction started, i.e. reverses time. When instruction execution resumes, the core expects the memory subsystem to be in a stable, i.e. pre-speculative, state as well.

Implemented in TimingSimpleCPU, and AtomicSimpleCPU.

Referenced by SimpleThread::htmAbortTransaction().

◆ init()

void BaseSimpleCPU::init ( )

override

Definition at line 122 of file base.cc.

References BaseCPU::init(), and BaseCPU::threadContexts.

Referenced by TimingSimpleCPU::init(), and AtomicSimpleCPU::init().

◆ initiateHtmCmd()

virtual Fault BaseSimpleCPU::initiateHtmCmd ( Request::Flags flags )

pure virtual

Hardware transactional memory commands (HtmCmds), e.g.

start a transaction and commit a transaction, are memory operations but are neither really (true) loads nor stores. For this reason the interface is extended and initiateHtmCmd() is used to instigate the command.

Implemented in TimingSimpleCPU, and AtomicSimpleCPU.

Referenced by SimpleExecContext::initiateHtmCmd().

◆ initiateMemAMO()

virtual Fault BaseSimpleCPU::initiateMemAMO	(	Addr	addr,
		unsigned	size,
		Request::Flags	flags,
		AtomicOpFunctorPtr	amo_op
	)

inlinevirtual

Reimplemented in TimingSimpleCPU.

Definition at line 167 of file base.hh.

References panic.

Referenced by SimpleExecContext::initiateMemAMO().

◆ initiateMemRead()

virtual Fault BaseSimpleCPU::initiateMemRead	(	Addr	addr,
		unsigned	size,
		Request::Flags	flags,
		const std::vector< bool > &	byte_enable = `std::vector<bool>()`
	)

inlinevirtual

Reimplemented in TimingSimpleCPU.

Definition at line 150 of file base.hh.

References panic.

Referenced by SimpleExecContext::initiateMemRead().

◆ postExecute()

void BaseSimpleCPU::postExecute ( )

Definition at line 583 of file base.cc.

Referenced by TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), AtomicSimpleCPU::tick(), and TimingSimpleCPU::translationFault().

◆ preExecute()

void BaseSimpleCPU::preExecute ( )

Definition at line 495 of file base.cc.

Referenced by TimingSimpleCPU::completeIfetch(), and AtomicSimpleCPU::tick().

◆ readMem()

virtual Fault BaseSimpleCPU::readMem	(	Addr	addr,
		uint8_t *	data,
		unsigned	size,
		Request::Flags	flags,
		const std::vector< bool > &	byte_enable = `std::vector<bool>()`
	)

inlinevirtual

Reimplemented in AtomicSimpleCPU.

Definition at line 144 of file base.hh.

References panic.

Referenced by SimpleExecContext::readMem().

◆ regStats()

void BaseSimpleCPU::regStats ( )

override

Definition at line 212 of file base.cc.

◆ resetStats()

void BaseSimpleCPU::resetStats ( )

override

Definition at line 397 of file base.cc.

References _status, Idle, and threadInfo.

◆ serializeThread()

void BaseSimpleCPU::serializeThread	(	CheckpointOut &	cp,
		ThreadID	tid
	)		const

overridevirtual

Serialize a single thread.

Parameters

cp	The stream to serialize to.
tid	ID of the current thread.

Reimplemented from BaseCPU.

Definition at line 406 of file base.cc.

References _status, Idle, Running, and threadInfo.

◆ setupFetchRequest()

void BaseSimpleCPU::setupFetchRequest ( const RequestPtr & req )

Definition at line 478 of file base.cc.

References curThread, DPRINTF, SimpleExecContext::fetchOffset, Request::INST_FETCH, SimpleThread::instAddr(), BaseCPU::instRequestorId(), BaseCPU::PCMask, SimpleExecContext::thread, and threadInfo.

Referenced by TimingSimpleCPU::fetch(), and AtomicSimpleCPU::tick().

◆ swapActiveThread()

void BaseSimpleCPU::swapActiveThread ( )

protected

Definition at line 145 of file base.cc.

References activeThreads, curStaticInst, curThread, StaticInst::isDelayedCommit(), BaseCPU::numThreads, and threadInfo.

Referenced by TimingSimpleCPU::fetch(), and AtomicSimpleCPU::tick().

◆ totalInsts()

Counter BaseSimpleCPU::totalInsts ( ) const

overridevirtual

Implements BaseCPU.

Definition at line 177 of file base.cc.

References threadInfo.

◆ totalOps()

Counter BaseSimpleCPU::totalOps ( ) const

overridevirtual

Implements BaseCPU.

Definition at line 188 of file base.cc.

References threadInfo.

◆ traceFault()

void BaseSimpleCPU::traceFault ( )

protected

Handler used when encountering a fault; its purpose is to tear down the InstRecord.

If a fault is meant to be traced, the handler won't delete the record and it will annotate the record as coming from a faulting instruction.

Definition at line 436 of file base.cc.

References DTRACE, Trace::InstRecord::setFaulting(), and traceData.

Referenced by TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), AtomicSimpleCPU::tick(), and TimingSimpleCPU::translationFault().

◆ unserializeThread()

void BaseSimpleCPU::unserializeThread	(	CheckpointIn &	cp,
		ThreadID	tid
	)

overridevirtual

Unserialize one thread.

Parameters

cp	The checkpoint use.
tid	ID of the current thread.

Reimplemented from BaseCPU.

Definition at line 414 of file base.cc.

References threadInfo.

◆ wakeup()

void BaseSimpleCPU::wakeup ( ThreadID tid )

overridevirtual

Implements BaseCPU.

Definition at line 425 of file base.cc.

References DPRINTF, BaseCPU::getCpuAddrMonitor(), AddressMonitor::gotWakeup, ThreadContext::Suspended, and threadInfo.

Referenced by AtomicSimpleCPU::AtomicCPUDPort::recvAtomicSnoop(), AtomicSimpleCPU::AtomicCPUDPort::recvFunctionalSnoop(), TimingSimpleCPU::DcachePort::recvFunctionalSnoop(), TimingSimpleCPU::DcachePort::recvTimingSnoopReq(), TimingSimpleCPU::threadSnoop(), and AtomicSimpleCPU::threadSnoop().

◆ writeMem()

virtual Fault BaseSimpleCPU::writeMem	(	uint8_t *	data,
		unsigned	size,
		Addr	addr,
		Request::Flags	flags,
		uint64_t *	res,
		const std::vector< bool > &	byte_enable = `std::vector<bool>()`
	)

inlinevirtual

Reimplemented in TimingSimpleCPU, and AtomicSimpleCPU.

Definition at line 156 of file base.hh.

References panic.

Referenced by SimpleExecContext::writeMem().

Member Data Documentation

◆ _status

Status BaseSimpleCPU::_status

protected

Definition at line 121 of file base.hh.

Referenced by AtomicSimpleCPU::activateContext(), TimingSimpleCPU::activateContext(), TimingSimpleCPU::advanceInst(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), TimingSimpleCPU::drain(), AtomicSimpleCPU::drainResume(), TimingSimpleCPU::drainResume(), TimingSimpleCPU::fetch(), TimingSimpleCPU::finishTranslation(), TimingSimpleCPU::handleReadPacket(), TimingSimpleCPU::handleWritePacket(), TimingSimpleCPU::initiateMemAMO(), TimingSimpleCPU::initiateMemRead(), TimingSimpleCPU::FetchTranslation::markDelayed(), TimingSimpleCPU::IcachePort::recvReqRetry(), TimingSimpleCPU::DcachePort::recvReqRetry(), resetStats(), TimingSimpleCPU::sendData(), TimingSimpleCPU::sendFetch(), serializeThread(), AtomicSimpleCPU::suspendContext(), TimingSimpleCPU::suspendContext(), AtomicSimpleCPU::switchOut(), TimingSimpleCPU::switchOut(), AtomicSimpleCPU::tick(), and TimingSimpleCPU::writeMem().

◆ activeThreads

std::list<ThreadID> BaseSimpleCPU::activeThreads

Definition at line 99 of file base.hh.

Referenced by AtomicSimpleCPU::activateContext(), TimingSimpleCPU::activateContext(), AtomicSimpleCPU::drain(), TimingSimpleCPU::drain(), AtomicSimpleCPU::drainResume(), TimingSimpleCPU::drainResume(), AtomicSimpleCPU::suspendContext(), TimingSimpleCPU::suspendContext(), and swapActiveThread().

◆ branchPred

BPredUnit* BaseSimpleCPU::branchPred

protected

Definition at line 84 of file base.hh.

Referenced by advancePC(), and preExecute().

◆ checker

CheckerCPU* BaseSimpleCPU::checker

Definition at line 96 of file base.hh.

Referenced by BaseSimpleCPU().

◆ curMacroStaticInst

StaticInstPtr BaseSimpleCPU::curMacroStaticInst

Definition at line 104 of file base.hh.

Referenced by advancePC(), TimingSimpleCPU::fetch(), preExecute(), and AtomicSimpleCPU::tick().

◆ curStaticInst

StaticInstPtr BaseSimpleCPU::curStaticInst

Definition at line 103 of file base.hh.

Referenced by advancePC(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), countInst(), TimingSimpleCPU::fetch(), postExecute(), preExecute(), swapActiveThread(), and AtomicSimpleCPU::tick().

◆ curThread

ThreadID BaseSimpleCPU::curThread

protected

Definition at line 83 of file base.hh.

◆ inst

TheISA::MachInst BaseSimpleCPU::inst

Current instruction.

Definition at line 102 of file base.hh.

Referenced by preExecute(), TimingSimpleCPU::sendFetch(), and AtomicSimpleCPU::tick().

◆ threadInfo

std::vector<SimpleExecContext*> BaseSimpleCPU::threadInfo

Definition at line 98 of file base.hh.

◆ traceData

Trace::InstRecord* BaseSimpleCPU::traceData

Definition at line 95 of file base.hh.

Referenced by AtomicSimpleCPU::amoMem(), TimingSimpleCPU::completeDataAccess(), TimingSimpleCPU::completeIfetch(), TimingSimpleCPU::htmSendAbortSignal(), TimingSimpleCPU::initiateHtmCmd(), TimingSimpleCPU::initiateMemAMO(), TimingSimpleCPU::initiateMemRead(), postExecute(), preExecute(), AtomicSimpleCPU::readMem(), SimpleExecContext::setPredicate(), AtomicSimpleCPU::tick(), traceFault(), TimingSimpleCPU::translationFault(), AtomicSimpleCPU::writeMem(), and TimingSimpleCPU::writeMem().

The documentation for this class was generated from the following files:

cpu/simple/base.hh
cpu/simple/base.cc

Public Member Functions

Public Attributes

Protected Types

Protected Member Functions

Protected Attributes

Additional Inherited Members

Detailed Description

Member Enumeration Documentation

◆ Status

Constructor & Destructor Documentation

◆ BaseSimpleCPU()

◆ ~BaseSimpleCPU()

Member Function Documentation

◆ advancePC()

◆ amoMem()

◆ checkForInterrupts()

◆ checkPcEventQueue()

◆ countInst()

◆ haltContext()

◆ htmSendAbortSignal()

◆ init()

◆ initiateHtmCmd()

◆ initiateMemAMO()

◆ initiateMemRead()

◆ postExecute()

◆ preExecute()

◆ readMem()

◆ regStats()

◆ resetStats()

◆ serializeThread()

◆ setupFetchRequest()

◆ swapActiveThread()

◆ totalInsts()

◆ totalOps()

◆ traceFault()

◆ unserializeThread()

◆ wakeup()

◆ writeMem()

Member Data Documentation

◆ _status

◆ activeThreads

◆ branchPred

◆ checker

◆ curMacroStaticInst

◆ curStaticInst

◆ curThread

◆ inst

◆ threadInfo

◆ traceData